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Operating Conditions
IO33 Pad Libraries Provide Interfaces to 3V Environments
Memory Cells Compiled to the Precise Requirements of the Design
Compatible with Atmel鈥檚 Extensive Range of Microcontroller, DSP, Standard-interface
and Application-specific Cells
EDAC Library
SEU Hardened DFF鈥檚
Cold Sparring Buffers
High Speed LVDS Buffers
PCI Buffer
Predefined die Sizes to Easily Accommodate Specified Packages
MQFP Packages up to 352 pins (340 Signal Pins)
MCGA Packages up to 625 pins (581 Signal Pins)
Offered to QML Q Grade
0.18 碌m CMOS
Cell-based ASIC
for Military Use
ATC18M
Advanced
Information
Description
The Atmel ATC18M is fabricated on a proprietary 0.18 碌m, up to six-layer-metal
CMOS process intended for use with a supply voltage of 1.8V 鹵 0.15V. Table 1 shows
the range for which Atmel library cells have been characterized.
Table 1.
Recommended Operating Conditions
Symbol
V
DD
V
DD3.3
V
I
V
O
TEMP
Parameter
DC Supply Voltage
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Operating Free Air
Temperature Range
Military
Conditions
Core and Standard I/Os
3V Interface I/Os
Min
1.65
3
0
0
-55
Typ
1.8
3.3
Max
1.95
3.6
V
DD
V
DD
+125
Unit
V
V
V
V
擄C
The Atmel cell libraries and megacell compilers have been designed in order to be
compatible with each other. Simulation representations exist for three types of operat-
ing conditions. They correspond to three characterization conditions defined as
follows:
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MIN conditions:
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T
J
= -55擄C
V
DD
(cell) = 1.95V
Process = fast
T
J
= +25擄C
V
DD
(cell) = 1.8V
Process = typ
T
J
= +125擄C
V
DD
(cell) = 1.65V
Process = slow
Rev. 4262A鈥揂ERO鈥?7/03
TYP conditions:
MAX conditions:
1
ATC18M相關(guān)型號(hào)PDF文件下載
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