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AT91SAM7S128-AI Datasheet

  • AT91SAM7S128-AI

  • THUMB BASED MICROCONTROLLERS

  • 32頁

  • ATMEL   ATMEL

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Features
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Incorporates the ARM7TDMI
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ARM
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Thumb
廬
Processor
鈥?High-performance 32-bit RISC Architecture
鈥?High-density 16-bit Instruction Set
鈥?Leader in MIPS/Watt
鈥?Embedded ICE In-circuit Emulation, Debug Communication Channel Support
128 Kbytes of Internal High-speed Flash, Organized in 512 Pages of 256 Bytes
鈥?Single Cycle Access at Up to 30 MHz in Worst Case Conditions
鈥?Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
鈥?Page Programming Time: 4 ms, Including Page Auto-erase, Full Erase Time: 10 ms
鈥?10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities,
Flash Security Bit
鈥?Fast Flash Programming Interface for High Volume Production
32 Kbytes of Internal High-speed SRAM, Single-cycle Access at Maximum Speed
Memory Controller (MC)
鈥?Embedded Flash Controller, Abort Status and Misalignment Detection
Reset Controller (RSTC)
鈥?Based on Power-on Reset and Low-power Factory-calibrated Brown-out Detector
鈥?Provides External Reset Signal Shaping and Reset Source Status
Clock Generator (CKGR)
鈥?Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL
Power Management Controller (PMC)
鈥?Software Power Optimization Capabilities, Including Slow Clock Mode (Down to
500 Hz) and Idle Mode
鈥?Three Programmable External Clock Signals
Advanced Interrupt Controller (AIC)
鈥?Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
鈥?Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt
Protected
Debug Unit (DBGU)
鈥?2-wire UART and Support for Debug Communication Channel interrupt,
Programmable ICE Access Prevention
Periodic Interval Timer (PIT)
鈥?20-bit Programmable Counter plus 12-bit Interval Counter
Windowed Watchdog (WDT)
鈥?12-bit key-protected Programmable Counter
鈥?Provides Reset or Interrupt Signals to the System
鈥?Counter May Be Stopped While the Processor is in Debug State or in Idle Mode
Real-time Timer (RTT)
鈥?32-bit Free-running Counter with Alarm
鈥?Runs Off the Internal RC Oscillator
One Parallel Input/Output Controller (PIOA)
鈥?Thirty-two Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
鈥?Input Change Interrupt Capability on Each I/O Line
鈥?Individually Programmable Open-drain, Pull-up resistor and Synchronous Output
Eleven Peripheral Data Controller (PDC) Channels
One USB 2.0 Full Speed (12 Mbits per second) Device Port
鈥?On-chip Transceiver, 328-byte Configurable Integrated FIFOs
One Synchronous Serial Controller (SSC)
鈥?Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
鈥?I虜S Analog Interface Support, Time Division Multiplex Support
鈥?High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
Two Universal Synchronous/Asynchronous Receiver Transmitters (USART)
鈥?Individual Baud Rate Generator, IrDA Infrared Modulation/Demodulation
鈥?Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
鈥?Full Modem Line Support on USART1
One Master/Slave Serial Peripheral Interface (SPI)
鈥?8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
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AT91 ARM
廬
Thumb
廬
-based
Microcontrollers
AT91SAM7S128
Summary
Preliminary
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6116AS鈥揂TARM鈥?0-Oct-04
Note: This is a summary document. A complete document
is not available at this time. For more information, please
contact your local Atmel sales office.

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