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AT76CL610 Datasheet

  • AT76CL610

  • AT76CL610 Specification Preliminary [Updated 06/03. 21 Pages...

  • 21頁(yè)

  • ETC

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Features
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Dual 6-bit Resolution
700 MHz Full-power Input Bandwidth (-3 dB)
Band Flatness (鹵0.5 dB) from DC to 350 MHz
1 Gsps Sampling Rate
SINAD = 35 dB Typ (5.7 ENOB)
鈥?THD = -47 dB, SFDR = -48 dB at F
S
= 1 Gsps, F
IN
= 250 MHz, (SFSR = -0.5dB FS)
2-tone IMD: -47 dBc Min at 1 Gsps, F
IN
= 249 MHz, 251 MHz
DNL = 0.35 LSB Typ, INL = 0.5 LSB Typ
Channel-to-channel Input Offset Error: 鹵1 LSB Max, 0 LSB Typ
Gain Matching (Channel-to-channel): 鹵0.25 dB Max, 0 dB Typ
Phase Matching (Channel-to-channel): 鹵2 deg Max, 0 deg typ
Channel-to-channel Mean Difference Error: 0.5 LSB (rms)
Channel-to-channel Max Difference Error: 鹵2 LSB Typ
Low Bit Error Rate (10
-9
) at 1 Gsps
Very Low Input Capacitance: 1 pF
800 mV
PP
Differential or Single Analog Inputs
Differential or Single-ended 50鈩?PECL-compatible Clock Inputs
LVDS Output Compatibility (100鈩?
1:2 Data Output Demultiplexer per ADC
LOW Power Consumption:
鈥?700 mW at
V
CCA
= V
CCD
= 3.15V/V
CCO
= 2.25V
Power Supply: 3.15V (Analog), 3.15V (Digital), 2.25V (Output)
Available in 80-lead TQFP Package
Temperature Range:
鈥?Industrial -20擄C < T
A
< 85擄C,
鈥?Commercial 0擄C < T
A
< 70擄C
Dual ADC 6-bit
1 Gsps
Converter
AT76CL610
Preliminary
Specification
Applications
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Satellite Receiver
Direct RF Down-conversion
Test Instrumentation
WLAN
For more information,
Description
The AT76CL610 is a monolithic dual 6-bit analog-to-digital converter, designed for
digitizing in-phase (I) and quadrature (Q) wide bandwidth analog signals at very high
sampling rates of up to 1 Gsps (giga-samples per second). The ability to directly inter-
face I and Q signals makes the AT76CL610 ideal for use in applications such as direct
satellite demodulation.
The AT76CL610 uses an innovative architecture and is fabricated with an advanced
high-speed BiCMOS process.
The two on-chip ADC cores have a closely matched 700 MHz full-power input band-
width, providing excellent dynamic performance in undersampling applications (high
IF digitizing).
The samples from each A/D converter are de-multiplexed by a 1:2 ratio and the output
data stream is LVDS-compliant.
please contact hotline-
bdc@gfo.atmel.com
Rev. 2158A鈥揃DC鈥?4/03
1

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