鈥?/div>
DAVIC/DVB/ETS300.429/ITU-T J.83 Annex A, C Fully Compliant
Direct IF Sampling (No Second IF Down Conversion Required) or Baseband Input
Internal 10-bit A/D Converter or Possibility to Use External A/D
1024, 512, 256, 128, 64, 32, 16 QAM And QPSK Demodulation
Roll-off Factor Adapted to Raised-cosine Filtered Signal (0.11 to 0.4)
Fully Digital Timing Recovery
Variable Symbol Rate Recovery
Anti-aliasing Continuously Variable Digital Filtering with Symbol Rate Adaptive
Bandwidth (1 to 18.75M Baud at the Same Sampling Frequency)
Fully Digital Carrier Recovery (Coherent or Differential For QPSK)
Robust Equalizer Acquisition
Selectable Transversal or Decision Feedback Equalizer
Dual Phase/Frequency Offset Recovery Up To 12% of the Symbol Rate with no
Degradation
MPEG2 Frame Synchronization
Reed-Solomon Decoder (204, 188, 8)
De-interleaving (I = 12 and I = 17)
Energy Dispersal Descrambling
2-wire Serial Interface (2WSI) Switch for Separate Bi-directional 2WSI Bus-to-tuner To
Avoid Phase Noise Problems Due to 2WSI
Integrated Clock Reference for Tuner, Especially Designed For NIU in CAN
Two AGCs: Analog and Digital Gains
Three Program Identifiers (PIDS) Filtering
IRQ Interrupt Request Generation to Simplify Monitoring
Bit Error Rate and Packet Error Rate Monitoring
Signal-to-noise Ratio Estimation, Residual Phase Noise Estimation
Automatic Spectrum Inversion
JTAG Support
0.35碌 CMOS Technology, 3.3V Operation
Available in a 144-lead LQFP Package
Digital
Reception/
Transmission IC
Integrated DVB
廬
-compliant QAM
Demodulator
AT76C651B
Summary
Description
The AT76C651B is a DVB-compliant Quadrature Amplitude Modulation (QAM)
demodulation circuit, which can be used in DVB and other applications using Quadra-
ture Phase Shift Keying (QPSK) or QAM transmission systems. The signal, after
output from tuner and adjacent channels rejection filter, is sampled at Intermediate
Frequency (IF).
The signal is converted to digital format and goes through several processing steps
required for demodulation: automatic gain control, baseband down conversion, timing
recovery with anti-aliasing filtering, square root raised-cosine receive filtering, carrier
recovery and digital gain control and equalization (linear and decision feedback dual
structure). The output from demodulation then goes through forward error decoding:
DVB/DAVIC de-mapping, frame synchronization, de-interleaving, Reed-Solomon
decoding and spectrum de-randomization. The output before decoding may also be
output directly for use with post-processing devices in applications other than DVB.
An additional block situated in the back-end may be used to filter out programmable
PIDs, providing additional flexibility in interactive solutions or DVB data-broadcast PC
receive cards.
It is especially designed for modem implementations with a 24-bit mask on one PID
(medium access control) and can be used for return channel implementation.
Rev. 1375BS鈥?1/01
Note: This is a summary document. A complete document is
available under NDA. For more information, please contact your
local Atmel sales office.
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