鈥?/div>
Controller (MAC) for Supporting Standard Rates up to 11 Mbps
Supports Antenna Diversity Algorithm, Automatic Receive Gain Control, Transmit Gain
Control, Transmit Filter for Japanese Regulatory and Differential or Single-ended I- and
Q-Baseband Signals
Integrates 160 KBytes of SRAM which Are Organized in Five Banks of 32 KBytes Each,
Offering the Flexibility for individually Configuring Each of them as Program or Data
Memory
Zero Wait States for Program Execution
Fast Data Transfers through DMA Channels
Low Power ARM7TDMI
廬
RISC Processor
The Bootstrap Code Supports External SPI EEPROM for the Custom Configuration
Parameters Used during the Device Enumeration Phase as Well as Default Parameters
for First Time EEPROM Programming
Glueless Parallel Flash Memory Interface, Supporting up to 128 KBytes of Nonvolatile
Memory
Glueless External SRAM Interface for all MAC Operations, Supporting up to
128 KBytes of External Memory
Wired Equivalency Privacy (WEP) in Hardware Supporting 64-bit and 128-bit Keys
Hardware Implementation of TKIP
Hardware Implementation of AES Encryption Supporting Various Modes
(CCM/CTR/CBC)
The WLAN Functions Can Be Easily Changed or Updated to New Requirements Since
They are Implemented in Microcode
Supports 11 Mbps Rates with Automatic Fallback to 5.5, 2 and 1 Mbps
SPI Interface and 13 GPIO Pins
176-ball LFBGA Package
Low-voltage 1.8V Core Operation
802.11b
Baseband and
Media Access
Controller
(MAC) for
PCMCIA Bus
AT76C504A
Summary
Block Diagram
PCMCIA
Interface
SPI Interface
Timers
Boot ROM
ARM7TDMI
External
Memory
Interface
Decoder/
Arbiter/
Bridge
Common Memory
Interface Controller
MAC Support
Unit (MSU)
Interrupt
Controller
Internal
Memory
(SRAM)
802.11b
Baseband
Encryption/
Decryption
Block
Rev. 2388CS鈥揥LAN鈥?7/03
Note: This is summary datasheet. A complete document is available under
NDA. For more information please contact your local Atmel sales office.
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