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AT697E Datasheet

  • AT697E

  • AT697E Advance Information Summary [Updated 6/03. 16 Pages]

  • 16頁

  • ETC

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F
eatures
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SPARC V8 High-performance Low-power 32-bit Architecture
鈥?8 Register Windows
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Integrated 32/64-bit Floating Point Unit
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Advanced Architecture
鈥?On-chip AMBA Bus
鈥?5-stage Pipeline
鈥?16-Kbyte Multi-sets Data Cache
鈥?32-Kbyte Multi-sets Instruction Cache
On-chip Peripherals
鈥?Memory Interface
Chip Select Generator
Waitstate Generator
SDRAM Controller
鈥?Timers
Two 24-bit Timers
Watchdog Timer
鈥?Two 8-bit UARTs
鈥?Interrupt Controller with 4 External Programmable Inputs
鈥?32 Parallel I/O Interface
鈥?33 MHz PCI Interface Compliant with 2.2 PCI Specification
Fault Tolerance by Design
鈥?Full Triple Modular Redundancy (TMR)
鈥?EDAC Protection
鈥?Parity Protection
Debug and Test Facilities
鈥?Debug Support Unit (DSU) for Trace and Debug
鈥?IEEE 1149.1 JTAG Interface
鈥?Four Hardware Watchpoints
Speed Optimized Code RAM Interface
8 or 40-bit boot-PROM (Flash) Interface Possibilities
Clock: 100 MHz (Target)
Core Consumption: To Be Defined
Performance: To Be Defined
Voltage Operating Range: 3.3V I/O - 1.8V Core
Temperature Operating Range: -55擄C to 125擄C
Total Dose Radiation Capability (Parametric & Functional)
鈥?100 Krads (Si) (Target)
Latch-up Immunity Better than 70 MeV.cm虜/mg (Target)
Package: MCGA 349 (Multi-Layer Column Grid Array)
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Rad-Hard 32-bit
SPARC
Embedded
Processor
AT697E
Advance
Information
Summary
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O
verview
The AT697E is a highly-integrated, high-performance 32-bit RISC embedded proces-
sor implementing the SPARC architecture V8 specification. The implementation is
based on the European Space Agency (ESA) LEON2 fault tolerant model.
The processor is manufactured using the Atmel standard 0.18 碌m CMOS commercial
process. It operates at a low voltage. It has been especially designed for space, as it
has on-chip concurrent transient and permanent error detection.
The AT697E includes an on-chip Integer Unit (IU), a Floating Point Unit (FPU), sepa-
rate instruction and data caches, hardware multiplier and divider, interrupt controller,
debug support unit with trace buffer, two 24-bit timers, Parallel and Serial interfaces,
Idle mode function, Watchdog, a PCI Interface and a flexible Memory Controller.
The design is highly testable with the support of a Debug System Unit (DSU) and a
boundary scan through JTAG interface.
Rev. 4226AS鈥揂ERO鈥?6/03
Note: This is a summary document. A complete
document is not available at this time. Contact
Atmel for a complete document.

AT697E相關型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    Rad-Hard 32-bit SPARC V8 Processor
    ATMEL
  • 英文版
    AT697E Advance Information Summary [Updated 6/03. 16 Pages]
    ETC
  • 英文版
    Rad-Hard 32 bit SPARC V8 Processor
    ATMEL
  • 英文版
    Small Optical Encoder Modules 200 LPI Analog Voltage Output
    ATMEL

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