鈥?/div>
鈥?Supports both Firmware Hub (FWH) and LPC Memory Read and Write Cycles
Auto-detection of FWH and LPC Memory Cycles
鈥?Can Be Used as FWH for Intel 8xx, E7xxx, and E8xxx Series Chipsets
鈥?Can Be Used as LPC Flash for Non-Intel Chipsets
Flexible, Optimized Sectoring for BIOS Applications
鈥?16-Kbyte Top Boot Sector, Two 8-Kbyte Sectors, One 32-Kbyte Sector,
Three 64-Kbyte Sectors
鈥?Or Memory Array Can Be Divided Into Four Uniform 64-Kbyte Sectors for Erasing
Two Configurable Interfaces
鈥?FWH/LPC Interface for In-System Operation
鈥?Address/Address Multiplexed (A/A Mux) Interface for Programming during
Manufacturing
FWH/LPC Interface
鈥?Operates with the 33 MHz PCI Bus Clock
鈥?5-signal Communication Interface Supporting Byte Reads and Writes
鈥?Two Hardware Write Protect Pins: TBL for Top Boot Sector and WP for All
Other Sectors
鈥?Five General-purpose Input (GPI) Pins for System Design Flexibility
鈥?Identification (ID) Pins for Multiple Device Selection
鈥?Sector Locking Registers for Individual Sector Read and Write Protection
A/A Mux Interface
鈥?11-pin Multiplexed Address and 8-pin Data Interface
鈥?Facilitates Fast In-System or Out-of-System Programming
Single Voltage Operation
鈥?3.0V to 3.6V Supply Voltage for Read and Write Operations
Industry-Standard Package Options
鈥?32-lead PLCC
鈥?40-lead TSOP
鈥?/div>
鈥?/div>
2-megabit
Firmware Hub
and Low-Pin
Count Flash
Memory
AT49LH002
鈥?/div>
鈥?/div>
鈥?/div>
Description
The AT49LH002 is a Flash memory device designed for use in PC and notebook BIOS
applications. The device complies with version 1.1 of Intel鈥檚 LPC Interface Specifica-
tion, providing support for both FWH and LPC memory read and write cycles. The
device can also automatically detect the memory cycle type to allow the AT49LH002
to be used as a FWH with Intel chipsets or as an LPC Flash with non-Intel chipsets.
Pin Configurations
PLCC
GPI2 [A8]
GPI3 [A9]
RST [RST]
NC
VCC
CLK [R/C]
GPI4 [A10]
NC
[IC] IC
NC
NC
NC
NC
[A10] GPI4
NC
[R/C] CLK
VCC
NC
[RST] RST
NC
NC
[A9] GPI3
[A8] GPI2
[A7] GPI1
[A6] GPI0
[A5] WP
[A4] TBL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
TSOP
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
GND
VCC
FWH4/LFRAME [WE]
INIT [OE]
RES [RDY/BSY]
RES [I/O7]
RES [I/O6]
RES [I/O5]
RES [I/O4]
VCC
GND
GND
FWH3/LAD3 [I/O3]
FWH2/LAD2 [I/O2]
FWH1/LAD1 [I/O1]
FWH0/LAD0 [I/O0]
ID0 [A0]
ID1 [A1]
ID2 [A2]
ID3 [A3]
[I/O1] FWH1/LAD1
[I/O2] FWH2/LAD2
GND
[I/O3] FWH3/LAD3
[I/O4] RES
[I/O5] RES
[I/O6] RES
14
15
16
17
18
19
20
[A7] GPI1
[A6] GPI0
[A5] WP
[A4] TBL
[A3] ID3
[A2] ID2
[A1] ID1
[A0] ID0
[I/O0] FWH0/LAD0
5
6
7
8
9
10
11
12
13
4
3
2
1
32
31
30
29
28
27
26
25
24
23
22
21
IC [IC]
GND
NC
NC
VCC
INIT [OE]
FWH4/LFRAME [WE]
RES [RDY/BSY]
RES [I/O7]
Note:
[ ] Designates A/A Mux Interface.
3377B鈥揊LASH鈥?/03
1
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AT49LH002-33TC 產(chǎn)品屬性
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