鈥?/div>
Fast Read Access Time - 70 ns
Automatic Page Write Operation
Internal Address and Data Latches for 64-Bytes
Internal Control Timer
Fast Write Cycle Times
Page Write Cycle Time: 3 ms or 10 ms Maximum
1 to 64-Byte Page Write Operation
Low Power Dissipation
80 mA Active Current
3 mA Standby Current
Hardware and Software Data Protection
DATA Polling for End of Write Detection
High Reliability CMOS Technology
Endurance: 10
4
or 10
5
Cycles
Data Retention: 10 Years
Single 5V
鹵
10% Supply
CMOS and TTL Compatible Inputs and Outputs
JEDEC Approved Byte-Wide Pinout
Full Military, Commercial, and Industrial Temperature Ranges
256 (32K x 8)
High Speed
CMOS
E
2
PROM
Description
The AT28HC256 is a high-performance Electrically Erasable and Programmable
Read Only Memory. Its 256K of memory is organized as 32,768 words by 8 bits.
Manufactured with Atmel鈥檚 advanced nonvolatile CMOS technology, the AT28HC256
offers access times to 70 ns with power dissipation of just 440 mW. When the
AT28HC256 is deselected, the standby current is less than 5 mA.
(continued)
Pin Configurations
Pin Name
A0 - A14
CE
OE
WE
I/O0 - I/O7
NC
DC
Function
Addresses
Chip Enable
Output Enable
Write Enable
TSOP
Top View
AT28HC256
Data Inputs/Outputs
No Connect
Don鈥檛 Connect
PGA
Top View
CERDIP, PDIP,
FLATPACK
Top View
LCC, PLCC
Top View
Note: PLCC package pins 1 and
17 are DON鈥橳 CONNECT.
0007F
2-279