鈥?/div>
鈥?Low-voltage Power Supply Range, 3.0V to 3.6V
or Standard 5V
鹵
10% Supply Range
Pin Compatible with JEDEC Standard AT27C256R
Low-power CMOS Operation
鈥?20 碌A(chǔ) max. (less than 1 碌A(chǔ) typical) Standby for V
CC
= 3.6V
鈥?29 mW max. Active at 5 MHz for V
CC
= 3.6V
JEDEC Standard Packages
鈥?32-lead PLCC
鈥?28-lead 330-mil SOIC
鈥?28-lead TSOP
High-reliability CMOS Technology
鈥?2,000V ESD Protection
鈥?200 mA Latchup Immunity
Rapid鈩?Programming Algorithm - 100 碌s/byte (typical)
CMOS and TTL Compatible Inputs and Outputs
鈥?JEDEC Standard for LVTTL
Integrated Product Identification Code
Commercial and Industrial Temperature Ranges
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
256K (32K x 8)
Low-voltage
OTP EPROM
AT27LV256A
Description
The AT27LV256A is a high performance, low power, low voltage 262,144-bit one-time
programmable read only memory (OTP EPROM) organized as 32K by 8 bits. It
requires only one supply in the range of 3.0V to 3.6V in normal read mode operation,
(continued)
Pin Configurations
Pin Name
A0 - A14
O0 - O7
CE
OE
NC
Function
Addresses
Outputs
Chip Enable
Output Enable
No Connect
VPP
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
SOIC Top View
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
A14
A13
A8
A9
A11
OE
A10
CE
O7
O6
O5
O4
O3
PLCC Top View
A7
A12
VPP
NC
VCC
A14
A13
TSOP Top View
Type 1
A8
A9
A11
NC
OE
A10
CE
O7
O6
OE
A11
A9
A8
A13
A14
VCC
VPP
A12
A7
A6
A5
A4
A3
22
23
24
25
26
27
28
1
2
3
4
5
6
7
21
20
19
18
17
16
15
14
13
12
11
10
9
8
A10
CE
O7
O6
O5
O4
O3
GND
O2
O1
O0
A0
A1
A2
O1
O2
GND
NC
O3
O4
O5
14
15
16
17
18
19
20
A6
A5
A4
A3
A2
A1
A0
NC
O0
5
6
7
8
9
10
11
12
13
4
3
2
1
32
31
30
29
28
27
26
25
24
23
22
21
Note: PLCC Package Pins 1 and 17
are DON鈥橳 CONNECT.
Rev. 0547C鈥?5/00
1
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AT27LV256A-55JC 產(chǎn)品屬性
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