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Configuration Programs for Field Programmable Gate Arrays (FPGAs)
Cascadable Read Back to Support Additional Configurations or Future
Higher-density Arrays
Low-power CMOS EEPROM Process
Programmable Reset Polarity
Available in the Space-efficient Surface-mount PLCC Package
In-System Programmable via 2-wire Bus
Emulation of Atmel鈥檚 AT24CXXX Serial EEPROMs
Available in 3.3V 鹵 10% LV and 5V 鹵 5% C Versions
System-friendly READY Pin
Description
The AT17C512A/010A and AT17LV512A/010A (high-density AT17A Series) FPGA
Configuration EEPROMs (Configurators) provide an easy-to-use, cost-effective con-
figuration memory for programming Altera FLEX
廬
devices. The AT17A Series is
packaged in the popular 20-lead PLCC and a 8-lead PDIP. The AT17A Series family
uses a simple serial-access procedure to configure one or more FPGA devices. The
AT17A Series organization supplies enough memory to configure one or multiple
smaller FPGAs. Using a feature of the AT17A Series, the user can select the polarity
of the reset function by programming four EEPROM bytes. The AT17A parts generate
their own internal clock by default and can be used as a system 鈥渕aster鈥?for loading
the FPGA devices. The internal clock can be disabled by the industrial programmer to
allow the AT17A parts to be used as system 鈥渟lave鈥? so that the external devices will
provide the clock for loading the FPGA devices.
The Atmel devices also support a system-friendly READY pin for the 20-lead PLCC
package and a write protect mechanism for all packages. The READY pin is used to
simplify system power-up considerations. The WP1 pin is used to protect part of the
Configurator memory during in-system programming.
The AT17A Series Configurator can be programmed with industry-standard program-
mers, Atmel鈥檚 ATDH2200E Programming Kit or Atmel鈥檚 ATDH2225 ISP Cable.
FPGA
Configuration
EEPROM
Memory
512K and 1M
Altera Pinout
AT17C512A
AT17LV512A
AT17C010A
AT17LV010A
Pin Configurations
PLCC
NC
DATA
NC
VCC
NC
PDIP
3
2
1
20
19
nCS
GND
NC
(A2) nCASC
NC
9
10
11
12
13
DCLK
WP1
NC
NC
OE
4
5
6
7
8
18
17
16
15
14
SER_EN
NC
NC
READY
NC
DATA
DCLK
OE
nCS
1
2
3
4
8
7
6
5
VCC
SER_EN
(A2) nCASC
GND
Rev. 0974D鈥?6/01
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