AT-41435 Datasheet

IC型號：
AT-41435
PDF描述：
Up to 6 GHz Low Noise Silicon Bipolar Transistor
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Up to 6 GHz Low Noise

Silicon Bipolar Transistor

Technical Data

AT-41435

Features

鈥?Low Noise Figure:

1.7 dB Typical at 2.0 GHz

3.0 dB Typical at 4.0 GHz

鈥?High Associated Gain:

14.0 dB Typical at 2.0 GHz

10.0 dB Typical at 4.0 GHz

鈥?High Gain-Bandwidth

Product:

8.0 GHz Typical f

鈥?Cost Effective Ceramic

Microstrip Package

finger interdigitated geometry

yields an intermediate sized

transistor with impedances that

are easy to match for low noise

and moderate power applications.

This device is designed for use in

low noise, wideband amplifier,

mixer and oscillator applications

in the VHF, UHF, and microwave

frequencies. An optimum noise

match near 50

鈩?/div>

at 1 GHz, makes

this device easy to use as a low

noise amplifier.

The AT-41435 bipolar transistor is

fabricated using Hewlett-Packard鈥檚

10 GHz f

Self-Aligned-Transistor

(SAT) process. The die is nitride

passivated for surface protection.

Excellent device uniformity,

performance and reliability are

produced by the use of ion-

implantation, self-alignment

techniques, and gold metalization

in the fabrication of this device.

35 micro-X Package

Description

Hewlett-Packard鈥檚 AT-41435 is a

general purpose NPN bipolar

transistor that offers excellent

high frequency performance. The

AT-41435 is housed in a cost

effective surface mount 100 mil

micro-X package. The 4 micron

emitter-to-emitter pitch enables

this transistor to be used in many

different functions. The 14 emitter

5965-8925E

4-114

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