音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

ASM5I2304B-2-08-ST Datasheet

  • ASM5I2304B-2-08-ST

  • 3.3V Zero Delay Buffer

  • 13頁

  • ALSC

掃碼查看芯片數據手冊

上傳產品規(guī)格書

PDF預覽

September 2005
rev 0.5
3.3V Zero Delay Buffer
Features
Zero input - output propagation delay, adjustable
by capacitive load on FBK input.
Multiple configurations - Refer 鈥淎SM5P2304B
Configurations Table鈥?
Input frequency range: 4MHz to 20MHz
Multiple low-skew outputs.
Output-output skew less than 200pS.
Device-device skew less than 500pS.
Two banks of four outputs.
Less than 200pS Cycle-to-Cycle jitter
(-1, -1H, -2, -2H).
Available in space saving, 8-pin 150 mil SOIC
Package.
3.3V operation.
Advanced 0.35碌 CMOS technology.
Industrial temperature available
.
ASM5P2304B
has an on-chip PLL, which locks to an input clock,
presented on the REF pin. The PLL feedback is required to
be driven to FBK pin, and can be obtained from one of the
outputs.
The
input-to-output
propagation
delay
is
guaranteed to be less than 250pS, and the output-to-output
skew is guaranteed to be less than 200pS.
The ASM5P2304B has two banks of two outputs each.
Multiple ASM5P2304B devices can accept the same input
clock and distribute it. In this case the skew between the
outputs of the two devices is guaranteed to be less than
500pS.
The
ASM5P2304B
is
available
in
two
different
configurations (Refer 鈥淎SM5P2304B Configurations Table).
The ASM5P2304B-1 is the base part, where the output
frequencies equal the reference if there is no counter in the
feedback path. The ASM5P2304B-1H is the high-drive
version of the -1 and the rise and fall times on this device
are much faster. The ASM5P2304B-2 allows the user to
obtain REF and 1/2X or 2X frequencies on each output
bank. The exact configuration and output frequencies
depend on which output drives the feedback pin.
high-speed
clocks
in
PC,
Functional Description
ASM5P2304B is a versatile, 3.3V zero-delay buffer
designed
to
distribute
workstation, datacom, telecom and other high-performance
applications. It is available in an 8 pin package. The part
Block Diagram
FBK
CLKA1
REF
PLL
CLKA2
/2
Extra Divider (-2)
CLKB1
CLKB2
Alliance Semiconductor
2575 Augustine Drive
鈥?/div>
Santa Clara, CA
鈥?/div>
Tel: 408.855.4900
鈥?/div>
Fax: 408.855.4999
鈥?/div>
www.alsc.com
Notice: The information in this document is subject to change without notice.

ASM5I2304B-2-08-ST相關型號PDF文件下載

掃碼下載APP,
一鍵連接廣大的電子世界。

在線人工客服

買家服務:
賣家服務:
技術客服:

0571-85317607

網站技術支持

13606545031

客服在線時間周一至周五
9:00-17:30

關注官方微信號,
第一時間獲取資訊。

建議反饋

聯系人:

聯系方式:

按住滑塊,拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見,您的參與是維庫提升服務的動力!意見一經采納,將有感恩紅包奉上哦!