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ASM3P2185A Datasheet

  • ASM3P2185A

  • EMI Reduction IC

  • 7頁

  • ALSC

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November 2003
rev 1.1
ASM3P2185A
EMI Reduction IC
Features
FCC approved method of EMI attenuation.
Provides up to 15dB EMI reduction.
Generates a 1X low EMI spread spectrum clock of
the input frequency.
Input frequency range: 25MHz to 50 MHz.
Internal loop filter minimizes external components
and board space.
Down Spread and Center Spread.
2 spread frequency deviation selections: -1.25%
and 鹵 0.6%.
Low inherent cycle-to-cycle jitter.
3.3V operating voltage range.
TTL or CMOS compatible inputs and outputs.
Low power CMOS design.
Supports notebook VGA and other LCD timing
controller applications.
Products are available for industrial temperature
range.
Available in 8-pin SOIC and TSSOP.
The ASM3P2185A reduces electromagnetic interference
(EMI) at the clock source, allowing system wide EMI
reduction for all the down stream clocks and data
dependent signals. The ASM3P2185A allows significant
system cost savings by reducing the number of circuit
board layers, ferrite beads, shielding, and other passive
components that are traditionally required to pass EMI
regulations.
The ASM3P2185A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.
The ASM3P2185A modulates the output of a single PLL
in order to 鈥渟pread鈥?the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal鈥檚 bandwidth is called 鈥榮pread
spectrum clock generation鈥?
Product Description
The ASM3P2185A is a versatile spread spectrum
frequency modulator designed specifically for a wide
range of input clock frequencies from 25MHz to 50MHz.
The ASM3P2185A can generate an EMI reduced clock
from an OSC or a system generated clock.
Applications
The ASM3P2185A is targeted towards EMI management
for memory and LVDS interfaces in mobile graphic
chipsets and high-speed digital applications such as PC
peripheral devices, consumer electronics, and embedded
controller systems.
Block Diagram
SS%
VDD
Modulation
XIN
Crystal
Oscillator
XOUT
Feedback
Divider
Frequenc
y
Phase
Detector
Loop
Filter
PLL
VCO
Output
Divider
ModOUT
VSS
Alliance Semiconductor
2575, Augustine Drive
鈥?/div>
Santa Clara, CA
鈥?/div>
Tel: 408.855.4900
鈥?/div>
Fax: 408.855.4999
鈥?/div>
www.alsc.com
Notice: The information in this document is subject to change without notice.

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