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AS4C4M4E1-50JC Datasheet

  • AS4C4M4E1-50JC

  • x4 EDO Page Mode DRAM

  • 14頁

  • ETC

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May 2001
廬
AS4C4M4E1
4M脳4 CMOS DRAM (EDO) family
Features
鈥?Organization: 4,194,304 words 脳 4 bits
鈥?High speed
- 50/60 ns RAS access time
- 25/30 ns column address access time
- 12/15 ns CAS access time
鈥?TTL-compatible, three-state I/O
鈥?JEDEC standard package
- 300 mil, 24/26-pin SOJ
- 300 mil, 24/26-pin TSOP
鈥?Low power consumption
- Active: 908 mW max
- Standby: 5.5 mW max, CMOS I/O
鈥?Extended data out
鈥?Refresh
- 2048 refresh cycles, 32 ms refresh interval for
AS4C4M4E1
- RAS-only or CAS-before-RAS refresh
鈥?5V power supply
鈥?Latch-up current
鈮?/div>
200 mA
鈥?ESD protection
鈮?/div>
2000 volts
鈥?Industrial and commercial temperature available
Pin arrangement
SOJ
V
CC
I/O0
I/O1
WE
RAS
NC
A10
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
GND
I/O3
I/O2
CAS
OE
A9
A8
A7
A6
A5
A4
GND
V
CC
I/O0
I/O1
WE
RAS
NC
A10
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
Pin designation
TSOP
24
23
22
21
20
19
18
17
16
15
14
13
GND
I/O3
I/O2
CAS
OE
A9
A8
A7
A6
A5
A4
GND
Pin(s)
A0 to A10
RAS
CAS
WE
I/O0 to I/O3
OE
V
CC
GND
Description
Address inputs
Row address strobe
Column address strobe
Write enable
Input/output
Output enable
Power
Ground
AS4C4M4E0
Selection guide
Symbol
Maximum RAS access time
Maximum column address access time
Maximum CAS access time
Maximum output enable (OE) access time
Minimum read or write cycle time
Minimum fast page mode cycle time
Maximum operating current
Maximum CMOS standby current
5/22/01; v.1.29 point>
AS4C4M4E0
AS4C4M4E1-50
50
25
12
13
85
25
135
2.0
AS4C4M4E1-60
60
30
15
15
100
30
120
2.0
Unit
ns
ns
ns
ns
ns
ns
mA
mA
P. 1 of 14
t
RAC
t
CAA
t
CAC
t
OEA
t
RC
t
PC
I
CC1
I
CC5
Alliance Semiconductor
Copyright 漏 Alliance Semiconductor. All rights reserved.

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