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AS3520 Datasheet

  • AS3520

  • Advanced Audio Decoder

  • 2頁(yè)

  • AMSCO

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Product Brief AS3520
Advanced Audio Decoder
AS3520
1.
General Description
Hardware Interfaces
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PRODUCT BRIEF
USB Interface version 1.1 (support of MSC)
MultiMediaCard Interface (support of MMC mode)
Smart Media Card Interface
NAND Flash Interface
I
2
C Slave Interface (for access to control registers)
SPI (master or slave)
General Purpose I/O Lines (40)
The chip is a fully integrated and highly flexible digital audio
decoder for the austriamicrosystems mobile music platform.
Main purpose of this platform is the integration of digital
audio decoder (MP3, AAC and other formats as future
option), micro controller unit, data interfaces and the analog
audio channels for reproduction of digital audio.
This codec-chip contains a high performance 18 bit digital
to analog converter. The dynamic range exceeds 95dB for
best audio quality, for multi media applications (audio
playback) within battery or line operated equipment.
An additional audio power amplifier can directly drive
external headphones or small 4鈩?speakers with a power of
up to half a watt. The power-up is click- and pop-less due to
a smooth start-up circuitry. The overall distortion level is
always below 0.02%.
The microphone input amplifier contains an automatic gain
control (AGC) with a dynamic range of 40dB to generate an
amplified and compressed signal for the ADC, which
provides 14 Bit resolution at 8kHz sampling-rate.
Furthermore all necessary power management is included
such as bandgap reference and three voltage regulators.
The two 2.9V regulators are used internally (analog and
digital supply), but can also be used for external purposes
as well. The third output is designed to supply the digital
core, and is programmable from 1.5V to 2.5V in 5 steps.
The performance of the regulators is excellent (noise, line-
and load-regulation) and allows the direct supply of
sensitive analog circuits.
Because of the internal supply and signal filtering only few
small external capacitors are required for de-coupling and
stabilising and lead to very low output noise.
The current consumption is very low and makes the chip
ideally for battery powered devices.
On chip DCDC Converter
1.0 to 5.5V input voltage range
Digital Supply, 2.9V
Analog Supply, 2,9V
Core Supply, 2.5V
USB Transceiver Supply, 3.2V
Dynamic range >95 dB
THD < -85dB
De-emphasis for 32 kHz, 44.1 kHz and 48 kHz
Max. 2x 0.5W @ 4鈩?/div>
Analog volume control 鈥?9dB to +3dB, 3dB steps
including mute)
Click- and pop-less startup and power down
Auxiliary inputs for additional audio sources
14 Bit
危鈭嗏垝ADC
mono,
8kHz voice quality recording
Automatic gain control (AGC)
Audio Formats: general platform for popular digital
audio formats: MP3, AAC, and others.
Audio sampling rates: 8, 11.025, 12, 16, 22.05, 24, 32,
44.1, and 48 kHz
Wide battery supply range 1.0V 鈥?5.5V
System Power Management Features
Low power consumption
4 On-chip high performance voltage regulators
18 Bit stereo DAC
Stereo power audio amplifier
Microphone input
2.
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Key Features
MCU and DSP functionality
Scaleable architecture
User accessible controller/DSP/memory resources
Boot ROM
Clock speed: 16 - 50 MHz
Embedded 32-Bit RISC Controller
3.
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Applications
Audio platform for cellular phones
Stand alone MP3 player
CD and DVD player
PDAs
1.5, June 2004
Page 1 of 2

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