50鈩?/div>
RF input,
I/P
INLO
Input
gm
Stage
Continuously
Variable
Attenuator
O/P
OPHI
(TZ)
Stage
OPLO
BALUN
RF to PA
COM1
APPLICATIONS
Output Power Control for Wireless Infrastructure
BIAS
&
VREF
COM2
VPS1
VREF
VPS2
IPBS
OPBS
COM2
COM2
COM2
Figure 1. Functional Block Diagram
PRODUCT DESCRIPTION
The ADL5330 is a high-performance voltage-controlled variable-
gain amplifier/attenuator, for use up to 3 GHz. The signal path is
fully differential; the balanced structure minimizes distortion, and
reduces the risk of spurious feed-forward at low gains and high
frequencies due to substrate coupling. While operation between a
balanced source and load is recommended, a single-sided input is
internally converted to differential from. The input impedance is
50-鈩?from
INHI
to
INLO.
The outputs will usually be coupled
into a 50-鈩?grounded load via a 1:1 balun. However, the output
pins,
OPHI
and
OPLO,
may also be used separately, with some
noise degradation. A single supply of 4.75 to 6 V is required.
With a 2140 MHz W-CDMA 3GPP forward path signal, the
ADL5330 is capable of producing greater than 鈥? dBm output
power while maintaining ACPR greater than 55 dB, and an output
noise floor less than -144 dBm/Hz.
Three cascaded sections are used. The 50-鈩?input system converts the
applied voltage to a pair of differential currents with high linearity and
good common rejection if driven by a single-sided source. The signal
currents are then applied to a proprietary voltage-controlled attenuator,
which provides precise definition of the overall gain, under the control
of the Linear-in-dB interface. Pin
GAIN
accepts a voltage from 0 V at
minimum gain to 1.4 V at full gain. The scaling factor is 20 mV/dB.
Optional external control of the input-stage and/or output-stage biasing
is provided using pins
IPBS
and
OPBS
respectively.
The output of the high-accuracy wideband attenuator is applied to a
differential trans-impedance output stage. Higher output power is
attainable at the lower operating frequencies by raising the supply
voltage to 6 V. When powered-down by a logic LO input on the
ENBL
pin, the current consumption is < TBD
碌A(chǔ).
The ADL5330 is available in a 24-lead (4 x 4mm) CSP package and is
specified for operation from ambient temperatures of
鈭?0擄C
to +85擄C.
Multiple Patents Pending
Rev. PrK
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its use;
nor for any infringements of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under
any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
World Wide Web Site: http://www.analog.com
漏2004 Analog Devices, Inc. All Rights Reserved
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