音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

AD9513 Datasheet

  • AD9513

  • 800 MHz Clock Distribution IC, Dividers,Delay Adjust, Three ...

  • 29頁

  • AD

掃碼查看芯片數據手冊

上傳產品規(guī)格書

PDF預覽

800 MHz Clock Distribution IC, Dividers,
Delay Adjust, Three Outputs
AD9513
FEATURES
1.6 GHz differential clock input
3 programmable dividers
Divide-by in range from1 to 32
Phase select for coarse delay adjust
Three 800 MHz/250 MHz LVDS/CMOS clock outputs
Additive output jitter 300 fs rms
Time delays up to 11.6 ns
Device configured with 4-level logic pins
Space-saving, 32-lead LFCSP
FUNCTIONAL BLOCK DIAGRAM
RSET
VS
GND
AD9513
/1. . . /32
LVDS/CMOS
OUT0
OUT0B
LVDS/CMOS
CLK
/1. . . /32
CLKB
LVDS/CMOS
SYNCB
OUT1
OUT1B
APPLICATIONS
Low jitter, low phase noise clock distribution
Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
High performance wireless transceivers
High performance instrumentation
Broadband infrastructure
ATE
/1. . . /32
鈭?/div>
t
OUT2
OUT2B
SETUP LOGIC
05595-001
VREF
S10
S9
S8
S7
S6
S5
S4
S3
S2
S1
S0
Figure 1.
GENERAL DESCRIPTION
The AD9513 features a three-output clock distribution IC in a
design that emphasizes low jitter and phase noise to maximize
data converter performance. Other applications with
demanding phase noise and jitter requirements also benefit
from this part.
There are three independent clock outputs that can be set to
either LVDS or CMOS levels. These outputs operate to
800 MHz in LVDS mode and to 250 MHz in CMOS mode.
Each output has a programmable divider that can be set to
divide by a selected set of integers ranging from 1 to 32. The
phase of one clock output relative to the other clock output can
be set by means of a divider phase select function that serves as
a coarse timing adjustment.
One of the outputs features a delay element with three selectable
full-scale delay values (1.8 ns, 6.0 ns, and 11.6 ns), each with
16 steps of fine adjustment.
The AD9513 does not require an external controller for
operation or setup. The device is programmed by means of
11 pins (S0 to S10) using 4-level logic. The programming pins
are internally biased to 鈪?V
S
. The VREF pin provides a level of
鈪?V
S
. V
S
(3.3 V) and GND (0 V) provide the other two logic levels.
The AD9513 is ideally suited for data converter clocking
applications where maximum converter performance is
achieved by encode signals with subpicosecond jitter.
The AD9513 is available in a 32-lead LFCSP and operates from
a single 3.3 V supply. The temperature range is 鈭?0擄C to +85擄C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
漏 2005 Analog Devices, Inc. All rights reserved.

AD9513相關型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    Digitally Programmable Delay Generator
    AD
  • 英文版
    Digitally Programmable Delag Generator
  • 英文版
    Digitally Programmable Delay Generator
    AD
  • 英文版
    Digitally Programmable Delag Generator
  • 英文版
    Hybrid RS-170 Video Digitizer
    AD
  • 英文版
    1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adj...
    AD
  • 英文版
    1.2 GHz Clock Distribution IC, PLL Core,Dividers, Delay Adju...
    AD
  • 英文版
    1.2 GHz Clock Distribution IC, 1.6 GHz Inputs,Dividers, Dela...
    AD
  • 英文版
    800 MHz Clock Distribution IC, Dividers,Delay Adjust, Three ...
    AD
  • 英文版
    1.6 GHz Clock Distribution IC,Dividers, Delay Adjust, Three ...
    AD
  • 英文版
    1.6 GHz Clock Distribution IC, Dividers,Delay Adjust, Two Ou...
    AD
  • 英文版
    655 MHz Low Jitter Clock Generator
    AD
  • 英文版
    Dual/Quad Input Network Clock Generator/Synchronizer
    AD
  • 英文版
    AD9548: Quad/Octal Input Network Clock Generator/Synchroniz...
    Analog Devices
  • 英文版
    Dual Input Network Clock Generator/Synchronizer
    AD
  • 英文版
    Dual Input Network Clock Generator/Synchronizer
    AD [Analog...
  • 英文版
    AD9551: Multiservice Clock Generator
    Analog Devices
  • 英文版
    AD9552: Oscillator Frequency Up Converter
    Analog Devices
  • 英文版
    High Speed Monolithic Pulse Width Modulator
    AD
  • 英文版
    High Speed Monolithic Pulse Width Modulator
    AD [Analog...

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務：
賣家服務：
技術客服：

0571-85317607

網站技術支持

13606545031

客服在線時間周一至周五
9:00-17:30

關注官方微信號，
第一時間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務的動力！意見一經采納，將有感恩紅包奉上哦！