a
FEATURES
EASY TO USE
Pin-Strappable Gains of 10 and 100
All Errors Specified for Total System Performance
Higher Performance than Discrete In Amp Designs
Available in 8-Lead DIP and SOIC
Low Power, 1.3 mA Max Supply Current
Wide Power Supply Range ( 2.3 V to 18 V)
EXCELLENT DC PERFORMANCE
0.15% Max, Total Gain Error
5 ppm/ C, Total Gain Drift
125 V Max, Total Offset Voltage
1.0 V/ C Max, Offset Voltage Drift
LOW NOISE
9 nV/鈭欻z, @ 1 kHz, Input Voltage Noise
0.28 V p-p Noise (0.1 Hz to 10 Hz)
EXCELLENT AC SPECIFICATIONS
800 kHz Bandwidth (G = 10), 200 kHz (G = 100)
12 s Settling Time to 0.01%
APPLICATIONS
Weigh Scales
Transducer Interface and Data Acquisition Systems
Industrial Process Controls
Battery-Powered and Portable Equipment
PRODUCT DESCRIPTION
Low Drift, Low Power
Instrumentation Amplifier
AD621
CONNECTION DIAGRAM
8-Lead Plastic Mini-DIP (N), Cerdip (Q)
and SOIC (R) Packages
G = 10/100
1
鈥揑N
2
8
G = 10/100
AD621
7
+V
S
TOP VIEW
6
OUTPUT
+IN
3
(Not to Scale)
5
REF
鈥揤
S 4
gain drift errors are achieved by the use of internal gain setting
resistors. Fixed gains of 10 and 100 can easily be set via external
pin strapping. The AD621 is fully specified as a total system,
therefore, simplifying the design process.
For portable or remote applications, where power dissipation,
size, and weight are critical, the AD621 features a very low
supply current of 1.3 mA max and is packaged in a compact
8-lead SOIC, 8-lead plastic DIP or 8-lead cerdip. The AD621
also excels in applications requiring high total accuracy, such
as precision data acquisition systems used in weigh scales and
transducer interface circuits. Low maximum error specifications
including nonlinearity of 10 ppm, gain drift of 5 ppm/擄C, 50
碌V
offset voltage, and 0.6
碌V/擄C
offset drift (鈥淏鈥?grade), make
possible total system performance at a lower cost than has been
previously achieved with discrete designs or with other mono-
lithic instrumentation amplifiers.
When operating from high source impedances, as in ECG and
blood pressure monitors, the AD621 features the ideal combina-
tion of low noise and low input bias currents. Voltage noise is
specified as 9 nV/鈭欻z at 1 kHz and 0.28
碌V
p-p from 0.1 Hz to
10 Hz. Input current noise is also extremely low at 0.1 pA/鈭欻z.
The AD621 outperforms FET input devices with an input bias
current specification of 1.5 nA max over the full industrial tem-
perature range.
Vp-p
The AD621 is an easy to use, low cost, low power, high accu-
racy instrumentation amplifier that is ideally suited for a wide
range of applications. Its unique combination of high perfor-
mance, small size and low power, outperforms discrete in amp
implementations. High functionality, low gain errors, and low
30,000
TOTAL ERROR, ppm OF FULL SCALE
25,000
3 OP AMP
IN AMP
(3 OP 07
S
)
10,000
20,000
TOTAL INPUT VOLTAGE NOISE, G = 100 鈥?/div>
(0.1 鈥?10Hz)
15,000
1,000
TYPICAL STANDARD
BIPOLAR INPUT
IN AMP
10,000
AD621A
100
5,000
10
AD621 SUPER ETA
BIPOLAR INPUT
IN AMP
0
0
5
10
SUPPLY CURRENT 鈥?mA
15
20
1
Figure 1. Three Op Amp IA Designs vs. AD621
0.1
1k
10k
100k
1M
SOURCE RESISTANCE 鈥?/div>
10M
100M
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
Figure 2. Total Voltage Noise vs. Source Resistance
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
漏 Analog Devices, Inc., 2001
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