PRELIMINARY TECHNICAL DATA
a
FEATURES
12-Bit Linearity and Monotonic 鈥?0
o
C to +125
o
C
Single +5V to +12V or dual 鹵5V supply
Unipolar or Bipolar Operation
Double Buffered Registers Enable Simultaneous Multi-
Channels Update
4 Separate Rail-to Rail Reference Inputs
Parallel Interface
Data Readback Capability
5碌s Settling Time
APPLICATIONS
Process Control Equipment
Closed Loop Servo Control
Data Acquisition Systems
Digitally Controlled Calibration
Motor Control
Optical Network Control Loops
GENERAL DESCRIPTION
The AD5582/AD5583 family of quad, 12-/10-bit, voltage-output
digital-to-analog converter is designed to operate from a single +5
to +15 volt or a dual 鹵5V supply. Built using a CBCMOS process,
this monolithic DAC offers the user low cost, and ease-of-use in
single or dual-supply systems.
The applied external reference V
REF
determines the full-scale
output voltage. Valid V
REF
values include V
SS
<V
REF
<V
DD
resulting
in a wide selection of full scale outputs. For multiplying
applications AC inputs can be as large as |V
DD
-V
SS
|. Two on-board
precision trimmed resistors are available for 4-Quadrant
configurations.
A doubled-buffered parallel interface offers 25Mbps data load rates.
A common level-sensitive load-DAC strobe (LDAC) input allows
simultaneous update of all DAC outputs from previously loaded
Input Registers. An external asynchronous reset (RS) forces all
registers to the zero code state when MSB='0' or to midscale when
MSB='1'.
Both parts are offered in the same pin-out to allow users to select
the amount of resolution appropriate for their application without
circuit card redesign.
The AD5582/AD5583 are specified over the extended industrial
(-40擄C to +125擄C) temperature range. Packages available include
thin 1.1 mm TSSOP-48 package.
QUAD, Parallel-Input, Voltage Output,
12-/10-Bit Digital-to-Analog Converter
AD5582/AD5583
FUNCTIONAL DIAGRAM
VRLA VRHA VRLB V RHB V
DD
1
2
3
4
5
A1
A0
DB11
37
36
24
ADDR
DECODE
6
V
OA
DB10
25
DB9
26
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
CS
W/R
VLOGIC
MSB
RS
LDAC
27
28
29
30
31
32
33
34
35
I
N
T
E
R
F
A
C
E
7
V
OB
Do
IN
Di REG
DAC
REG
38
RA
RB
RC
20k鈩?/div>
39
20k鈩?/div>
40
AD5582
OE
8
AGND
23
22
19
17
18
21
16
20
15
14
13
12
11
9
VOC
VOD
CONTROL
LOGIC
10
DVDD
DGND
VRHDV RLD
V
RHC RLC SS
V
V
+2.5V
AD R 421
V
R E FH
A
B
C
D
AD 5582
鹵2.5V
DAC A
鹵2.5V
R
A
R
B
R
C
V
R E FL
A
B
C
D
DAC B
鹵2.5V
DAC C
鹵2.5V
-2.5V
DAC D
D IG IT A L C IR C U IT R Y O M IT T E D F O R C L A R IT Y
Figure 1 Using Onboard Offset resistors to generate a negative
voltage REF
REV PrC, 23 APR '01
Information furnished by Analog Devices is believed to be accurate and reliable. However,
no responsibility is assumed by Analog Devices for its use; nor for any infringements of
patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106,
Norwood, MA 02062-9106 U
.
S
.
A
.
Tel: 781/329-4700
Fax:781/326-8703
World Wide Web Site: http://www.analog.com
漏Analog Devices, Inc., 2000
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