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AD5338ARM Datasheet

  • AD5338ARM

  • 2.5 V to 5.5 V, 250 UA, 2-Wire Interface Dual-Voltage Output...

  • 24頁

  • AD

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2.5 V to 5.5 V, 250 碌A(chǔ), 2-Wire Interface
Dual-Voltage Output, 8-/10-/12-Bit DACs
AD5337/AD5338/AD5339
FEATURES
AD5337
2 buffered 8-bit DACs in 8-lead MSOP
AD5338, AD5338-1
2 buffered 10-bit DACs in 8-lead MSOP
AD5339
2 buffered 12-bit DACs in 8-lead MSOP
Low power operation: 250 mA @ 3 V, 300 mA @ 5 V
2-wire (I
2
C廬compatible) serial interface
2.5 V to 5.5 V power supply
Guaranteed monotonic by design over all codes
Power-down to 80 nA @ 3 V, 200 nA @ 5 V
3 power-down modes
Double-buffered input logic
Output range: 0 V to V
REF
Power-on reset to 0 V
Simultaneous update of outputs (LDAC function)
Software clear facility
Data readback facility
On-chip rail-to-rail output buffer amplifiers
Temperature range 鈭?0擄C to +105擄C
GENERAL DESCRIPTION
AD5337/AD5338/AD5339 are dual 8-, 10-, and 12-bit buffered
voltage output DACs in an 8-lead MSOP package, which
operate from a single 2.5 V to 5.5 V supply, consuming 250 碌A(chǔ)
at 3 V. On-chip output amplifiers allow rail-to-rail output swing
with a slew rate of 0.7 V/碌s. A 2-wire serial interface operates at
clock rates up to 400 kHz. This interface is SMBus-compatible
at V
DD
< 3.6 V. Multiple devices can be placed on the same bus.
The references for the two DACs are derived from one reference
pin. The outputs of all DACs may be updated simultaneously
using the software LDAC function. The parts incorporate a
power-on reset circuit that ensures that the DAC outputs power
up to 0 V and remain there until a valid write to the device
takes place. A software clear function resets all input and DAC
registers to 0 V. A power-down feature reduces the current
consumption of the devices to 200 nA @ 5 V (80 nA @ 3 V).
The low power consumption of these parts in normal operation
makes them ideally suited to portable battery-operated
equipment. The power consumption is typically 1.5 mW at 5 V
and 0.75 mW at 3 V, reducing to 1 碌W in power-down mode.
APPLICATIONS
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
Industrial process control
FUNCTIONAL BLOCK DIAGRAM
V
DD
LDAC
REFIN
SCL
SDA
INTERFACE
LOGIC
INPUT
REGISTER
DAC
REGISTER
STRING
DAC A
BUFFER
V
OUT
A
A0
INPUT
REGISTER
DAC
REGISTER
STRING
DAC B
BUFFER
V
OUT
B
POWER-DOWN
LOGIC
03756-A-001
POWER-ON
RESET
AD5337/AD5338/AD5339
GND
Figure 1.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
漏 2004 Analog Devices, Inc. All rights reserved.

AD5338ARM 產(chǎn)品屬性

  • Data Converter FundamentalsDAC Architectures

  • 50

  • 集成電路 (IC)

  • 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器

  • -

  • 7µs

  • 10

  • I²C，串行

  • 2

  • 單電源

  • -

  • -40°C ~ 105°C

  • 表面貼裝

  • 8-TSSOP，8-MSOP（0.118"，3.00mm 寬）

  • 8-MSOP

  • 管件

  • 2 電壓，單極；2 電壓，雙極

  • 14.8k

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