AC574 Datasheet

IC型號：
AC574
PDF描述：
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
文件大小：
529.47KB
PDF頁數(shù)：
16頁
芯片廠家：
TI

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SN54AC574, SN74AC574

OCTAL D TYPE EDGE TRIGGERED FLIP FLOPS

WITH 3 STATE OUTPUTS

SCAS541E 鈭?OCTOBER 1995 鈭?REVISED OCTOBER 2003

2-V to 6-V V

Operation

Inputs Accept Voltages to 6 V

Max t

of 8.5 ns at 5 V

3-State Outputs Drive Bus Lines Directly

SN54AC574 . . . J OR W PACKAGE

SN74AC574 . . . DB, DW, N, NS, OR PW PACKAGE

(TOP VIEW)

description/ordering information

These 8-bit flip-flops feature 3-state outputs

designed specifically for driving highly capacitive

or relatively low-impedance loads. The devices

are particularly suitable for implementing buffer

registers, I/O ports, bidirectional bus drivers, and

working registers.

The eight flip-flops of the

鈥睞C574

devices are

D-type edge-triggered flip-flops. On the positive

transition of the clock (CLK) input, the Q outputs

are set to the logic levels set up at the data (D)

inputs.

A buffered output-enable (OE) input can be used

to place the eight outputs in either a normal

logic state (high or low logic levels) or the

high-impedance state. In the high-impedance

state, the outputs neither load nor drive the bus

lines significantly. The high-impedance state and

the increased drive provide the capability to drive

bus lines in a bus-organized system without need

for interface or pullup components.

OE does not affect internal operations of the

flip-flop. Old data can be retained or new data can

be entered while the outputs are in the

high-impedance state.

ORDERING INFORMATION

PDIP 鈭?N

SOIC 鈭?DW

鈭?0 C 85擄C

鈭?0擄C to 85 C

SOP 鈭?NS

SSOP 鈭?DB

TSSOP 鈭?PW

CDIP 鈭?J

鈭?5 C 125擄C

鈭?5擄C to 125 C

CFP 鈭?W

LCCC 鈭?FK

PACKAGE鈥?/div>

Tube

Tape and reel

Tube

Tape and reel

Tube

GND

CLK

SN54AC574 . . . FK PACKAGE

(TOP VIEW)

3 2 1 20 19

9 10 11 12 13

ORDERABLE

PART NUMBER

SN74AC574N

SN74AC574DW

SN74AC574DWR

SN74AC574NSR

SN74AC574DBR

SN74AC574PW

SN74AC574PWR

SNJ54AC574J

SNJ54AC574W

SNJ54AC574FK

鈥?Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

On products compliant to MIL PRF 38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

錚?/div>

2003, Texas Instruments Incorporated

POST OFFICE BOX 655303

鈥?/div>

DALLAS, TEXAS 75265

GND

CLK

TOP-SIDE

MARKING

SN74AC574N

AC574

SNJ54AC574J

SNJ54AC574W

SNJ54AC574FK

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