AC533 Datasheet

IC型號：
AC533
PDF描述：
OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
文件大小：
445.69KB
PDF頁數(shù)：
16頁
芯片廠家：
TI

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SN54AC533, SN74AC533

OCTAL TRANSPARENT D TYPE LATCHES

WITH 3 STATE OUTPUTS

SCAS555C 鈭?NOVEMBER 1995 鈭?REVISED OCTOBER 2003

2-V to 6-V V

Operation

Inputs Accept Voltages to 6 V

Max t

of 10.5 ns at 5 V

3-State Inverting Outputs Drive Bus Lines

Directly

Full Parallel Access for Loading

SN54AC533 . . . J OR W PACKAGE

SN74AC533 . . . DB, DW, N, NS, OR PW PACKAGE

(TOP VIEW)

description/ordering information

The 鈥橝C533 devices are octal transparent D-type

latches with 3-state outputs. When the

latch-enable (LE) input is high, the Q outputs

follow the complements of the data (D) inputs.

When LE is taken low, the Q outputs are latched

at the inverse logic levels set up at the D inputs.

A buffered output-enable (OE) input can be used

to place the eight outputs in either a normal logic

state (high or low logic levels) or the

high-impedance state. In the high-impedance

state, the outputs neither load nor drive the bus

lines significantly. The high-impedance state and

increased drive provide the capability to drive bus

lines without need for interface or pullup

components.

OE does not affect the internal operations of the

latches. Old data can be retained or new data can

be entered while the outputs are in the

high-impedance state.

GND

SN54AC533 . . . FK PACKAGE

(TOP VIEW)

3 2 1 20 19

9 10 11 12 13

To ensure the high-impedance state during power up or power down, OE should be tied to V

through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

ORDERING INFORMATION

PDIP 鈭?N

SOIC 鈭?DW

鈭?0 C 85擄C

鈭?0擄C to 85 C

SOP 鈭?NS

SSOP 鈭?DB

TSSOP 鈭?PW

CDIP 鈭?J

鈭?5 C 125擄C

鈭?5擄C to 125 C

CFP 鈭?W

LCCC 鈭?FK

PACKAGE鈥?/div>

Tube

Tape and reel

Tube

Tape and reel

Tube

ORDERABLE

PART NUMBER

SN74AC533N

SN74AC533DW

SN74AC533DWR

SN74AC533NSR

SN74AC533DBR

SN74AC533PW

SN74AC533PWR

SNJ54AC533J

SNJ54AC533W

SNJ54AC533FK

AC533

SNJ54AC533J

SNJ54AC533W

SNJ54AC533FK

AC533

TOP-SIDE

MARKING

SN74AC533N

鈥?Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

POST OFFICE BOX 655303

錚?/div>

2003, Texas Instruments Incorporated

鈥?/div>

DALLAS, TEXAS 75265

GND

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