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ABTE16245 Datasheet

  • ABTE16245

  • 16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE...

  • 214.06KB

  • 13頁(yè)

  • TI

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SN54ABTE16245, SN74ABTE16245
16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS226J 鈥?JULY 1993 鈥?REVISED DECEMBER 2001
D
D
D
D
D
D
D
D
D
Members of the Texas Instruments
Widebus錚?Family
Support the VME64 ETL Specification
Reduced, TTL-Compatible, Input Threshold
Range
High-Drive Outputs (I
OH
= 鈥?0 mA,
I
OL
= 90 mA) Support 25-鈩?Incident-Wave
Switching
V
CC
BIAS Pin Minimizes Signal Distortion
During Live Insertion
Internal Pullup Resistor on OE Keeps
Outputs in High-Impedance State During
Power Up or Power Down
Distributed V
CC
and GND Pins Minimize
High-Speed Switching Noise
Equivalent 25-鈩?Series Damping Resistor
on B Port
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
SN54ABTE16245 . . . WD PACKAGE
SN74ABTE16245 . . . DGG OR DL PACKAGE
(TOP VIEW)
description
The 鈥橝BTE16245 devices are 16-bit (dual-octal)
22
27
noninverting 3-state transceivers designed for
23
26
synchronous two-way communication between
24
25
data buses. The control-function implementation
minimizes external timing requirements. These
devices can be used as two 8-bit transceivers or
one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus,
depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to
disable the device so that the buses are effectively isolated. When OE is low, the device is active.
The B port has an equivalent 25-鈩?series output resistor to reduce ringing. Active bus-hold inputs also are on
the B port to hold unused or floating inputs at a valid logic level.
The A port provides for the precharging of the outputs via V
CC
BIAS, which establishes a voltage between 1.3 V
and 1.7 V when V
CC
is not connected.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
1DIR
1B1
2B1
GND
1B2
2B2
V
CC
1B3
2B3
GND
1B4
2B4
1B5
2B5
GND
1B6
2B6
V
CC
1B7
2B7
GND
1B8
2B8
2DIR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
V
CC
BIAS
1A1
2A1
GND
1A2
2A2
V
CC
1A3
2A3
GND
1A4
2A4
1A5
2A5
GND
1A6
2A6
V
CC
1A7
2A7
GND
1A8
2A8
OE
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
錚?/div>
2001, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
1

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