Philips Semiconductors
Product specification
Low noise, high drive, metastable immune, PLD
ABT22V10-7
DESCRIPTION
The ABT22V10 is a versatile PAL廬 device fabricated with the
Philips BiCMOS process known as QUBiC. The QUBiC process
produces a very high speed device (7.5ns worst case) which has
excellent noise characteristics. The ground bounce, with 9 outputs
switching and the 10th held low is less than 0.8V (see page 12).
The ABT22V10 is designed so the outputs can never display a
metastable state due to set up and hold time violations. If set up
and hold times are violated, the outputs will not glitch or display a
metastable state (the propagation delays may, however, be
extended).
The ABT22V10 uses the familiar AND/OR logic array structure,
which allows direct implementation of sum-of-product equations.
This device has a programmable AND array which drives a fixed OR
array. The AND array is programmed to create custom product
terms while the fixed OR array sums selected terms at the output.
The OR sum of the products feeds the 鈥淥utput Macro Cell鈥?(OMC),
which can be individually configured as a dedicated input, a
combinatorial output, or a registered output with internal feedback.
In other words, the architecture provides maximum design flexibility
by allowing the Output Macro Cell to be configured by the user.
This device is pin and JEDEC file compatible with industry standard
22V10 and can be used in all standard applications where speed is
to be maximized.
PIN CONFIGURATIONS
N Package
I0/CLK
I1
I2
I3
I4
I5
I6
I7
I8
1
2
3
4
5
6
7
8
9
24 V
CC
23 F9
22 F8
21 F7
20 F6
19 F5
18 F4
17 F3
16 F2
15 F1
14 F0
13 I11
I9 10
I10 11
GND 12
N = Plastic Dual In-Line Package (300mil-wide)
A Package
I2
4
I1
CLK/
I0 NC V
CC
F9 F8
3
2
1 28 27 26
25 F7
24 F6
23 F5
22 NC
21 F4
20 F3
19 F2
12
I9
13
14
15
16
17
18
FEATURES
I3
5
鈥?/div>
Ultra fast 7.5ns t
PD
and 6ns t
CO
鈥?/div>
High output drive; 48mA = I
OL
(complete specification, page 3)
鈥?/div>
Metastable immune flip-flops,
蟿
= 83pS (complete specification,
鈥?/div>
Low ground bounce (<0.8V)
鈥?/div>
Varied product term distribution with up to 16 product terms per
鈥?/div>
鈥?/div>
Power-up reset on all registers
鈥?/div>
Synchronous Preset/Asynchronous Reset
鈥?/div>
Programmable on standard PAL-type device programmers
鈥?/div>
Design support provided using SNAP software development
package and other CAD tools for PLDs
output for complex functions
Programmable output polarity
page 9)
I4 6
I5
7
NC 8
I6 9
I7 10
I8 11
I10 GND NC I11 F0 F1
A = Plastic Leaded Chip Carrier
SP00406
PIN LABEL DESCRIPTIONS
I1 鈥?I11
NC
Dedicated Input
Not Connected
Macro Cell Input/Output
Clock Input/Dedicated Input
Supply Voltage
Ground
APPLICATIONS
鈥?/div>
DMA control
鈥?/div>
State machine implementation
鈥?/div>
High speed graphics processing
鈥?/div>
Counters/shift registers
鈥?/div>
SSI/MSI random logic replacement
鈥?/div>
High speed memory decoder
ORDERING INFORMATION
DESCRIPTION
24-Pin Plastic Dual-In-Line Package 300mil-wide
28-Pin Plastic Leaded Chip Carrier
廬PAL
is a registered trademark of Advanced Micro Devices, Inc.
F0 鈥?F9
CLK/I0
V
CC
GND
ORDER CODE
ABT22V10鈥?N
ABT22V10鈥?A
DRAWING NUMBER
SOT222-1
SOT261-3
1995 Sep 26
2
853-1735 15806
ABT22V10-7/10A/B相關型號PDF文件下載
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Low Noise. High Drive. Metastable Immune. PLD
ETC
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