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ADS121x ANALOG-DIGITAL CONVERTER
APPLICATIONS PRIMER
By Wm. P. Klein, P.E.
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The ADS121x
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family of analog-to-digital converters repre-
sents a unique form of device for industrial use. To accom-
plish the performance level of no missing codes to 24 bits
and effective resolution to 23 bits (ADS1210/11) requires
some special handling. Each of the members of the ADS121x
family of A/D converters is a digital subsystem with an
analog front-end. This paper is intended to help understand
the operation and therefore make the inclusion of these
unique devices easier for the system designer.
The structure of these devices is shown in the simplified
circuit diagram in Figure 1. The signal processing channel is
composed of a Programmable Gain Amplifier (PGA), a
second-order delta-sigma modulator, and a third-order digi-
tal filter. The signal processing channel is supported by a
2.5V reference, a 3.3V bias generator, a clock generator, and
a microcontroller with serial interface. Additionally, in the
ADS1211 and ADS1213, a four input differential multi-
plexer is included.
In operation, the converter accepts a voltage at the analog
input, amplifies it through the PGA, and presents that volt-
age to the delta-sigma modulator. The PGA is a switched
capacitor circuit with gain being accomplished by the re-
peated sampling of the applied signal voltage being accumu-
lated on a capacitor circuit. A unique feature of these
converters, to improve effective resolution, is the Turbo
Mode, which is processing extra samples of the PGA output
through the delta-sigma modulator and then averaging these
readings in the digital filter. This extra conversion rate is set
by the Turbo Mode Rate (TMR). The values, averaged by
the digital filter, are loaded into the Data Out Register
(DOR). Self calibration procedures exist to compensate for
offset and gain errors.
The control of all of these functions is accomplished by a
combination of pin programming and internal control regis-
ter values. The DOR is updated at regular intervals. Each
DOR update is used to signal the opportunity to communi-
cate with the device through a serial interface. These com-
munication events can be used to change the values in the
control registers or read the data from the DOR.
The converter is considered here from five aspects. The
topics to be discussed are Analog Elements, Digital Ele-
ments, Power Supply Considerations, Internal Elements and
Operational Considerations.
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As this Application Bulletin is going to press, the ADS1214 and ADS1215 are
being introduced. These new devices differ from the devices described here in
two areas. A follow-on Application Bulletin is planned to cover the unique fea-
tures of these new devices.
AGND AV
DD
REF
OUT
REF
IN
V
BIAS
X
IN
X
OUT
A
IN
1P
A
IN
1N
A
IN
2P
A
IN
2N
A
IN
3P
A
IN
3N
A
IN
4P
A
IN
4N
MUX
A
IN
P
+2.5V
Reference
+3.3V Bias
Generator
Clock Generator
DGND
DV
DD
Micro Controller
Second-Order
鈭嗏垜
Modulator
Third-Order
Digital Filter
Instruction Register
Command Register
Data Output Register
Offset Register
Full-Scale Register
SCLK
SDIO
SDOUT
PGA
A
IN
N
Modulator Control
Serial Interface
ADS1212 Only
ADS1210/1211
DSYNC
CS
MODE
DRDY
FIGURE 1. Simplified Circuit Diagram.
漏
1998 Burr-Brown Corporation
AB-127
1
Printed in U.S.A. February, 1998
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