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AB-022 Datasheet

  • AB-022

  • AB-022 - FAST SETTLING LOW-PASS FILTER

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  • 3頁

  • ETC

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APPLICATION BULLETIN
FAST SETTLING LOW-PASS FILTER
By Rod Burt and R. Mark Stitt (602) 746-7445
Mailing Address: PO Box 11400 鈥?Tucson, AZ 85734 鈥?Street Address: 6730 S. Tucson Blvd. 鈥?Tucson, AZ 85706
Tel: (602) 746-1111 鈥?Twx: 910-952-111 鈥?Telex: 066-6491 鈥?FAX (602) 889-1510 鈥?Immediate Product Info: (800) 548-6132
Noise reduction by filtering is the most commonly used
method for improving signal-to-noise ratio. The increase in
settling time, however, can be a serious disadvantage in
some applications such as high-speed data acquisition sys-
tems. The nonlinear filter described here is a simple way to
get a four-to-one improvement in settling time as compared
to a conventional filter.
To understand the circuit, first consider the dynamics of a
single-pole RC filter (Figure 1). Filtering reduces broadband
or 鈥渨hite鈥?noise by the square root of the bandwidth reduc-
tion as shown by the following calculation:
f
2
f
2
V
IN
1
2
V
OUT
R
1
10k鈩?/div>
C
1
*
3
4
* For 10kHz, C
1
= 1592pF.
f
鈥?dB
= 1/(2 鈥?/div>
鈥?R
1
鈥?C
1
)
FIGURE 1. Conventional Single-Pole RC Filter.
e
n2
= e
B2
df = e
B2
鈥?f
f
1
f
1
V
IN
e
n
= e
B
(f
2
鈥?f
1
)
1/2
Where:
e
n
= total noise (Vrms)
e
B
= broadband noise (V/鈭欻z)
f
1
, f
2
= frequency range of interest (Hz)
In other words, if the frequency range (f
2
鈥?f
1
) is reduced by
a factor of 100, the total noise would be reduced by a factor
of 10.
Unfortunately, settling time depends on bandwidth. The
penalty for the noise reduction is increased settling time. For
a single-pole filter, the time needed for the signal to settle to
any given accuracy can be calculated as follows:
For V
O
/V
IN
at time = t
S
V
O
V
IN
鈥?/div>
V
(
V
= 1 鈥?e
鈥?t
S
/[R
1
鈥?C
1
])
O
R
1
10k鈩?/div>
Diodes
1N4148
V
OUT
C
1
*
6
7
* For 10kHz, C
1
= 1592pF.
f
鈥?dB
= 1/(2 鈥?/div>
鈥?R
1
鈥?C
1
)
8
9
10
11
12
13
14
15
16
FIGURE 2. Diode-Clamped Nonlinear Filter (can improve
0.01% settling time for a conventional filter by
2/1 for a 20V step).
NONLINEAR FILTER
To understand how a nonlinear filter can improve settling
time, consider the simple diode clamped nonlinear filter,
shown in Figure 2. Settling time is improved because the
filter capacitor, C
1
, is charged faster through the low forward
biased diode impedance (R
ON
) during the initial portion of a
large input step change. When the difference between the
input and output voltage becomes less than the forward
biased diode drop (about 0.6V), the diode turns off and C
1
reacts with R
1
alone. At this point, the circuit behaves like a
normal single-pole RC filter.
Assuming diode R
ON
is negligible, the improvement in
settling time depends on the ratio of the input step voltage to
the forward biased diode voltage. For a step of 鈥?0V to
+10V (a 20V step), the improvement is ln(0.60/20) or 3.5
time constants. In other words, for a 20V step, the simple
AB-022
Printed in U.S.A. January, 1991
鈥?
IN
)
鈥?100 = %
therefore
t
S
= 鈥搇n(%/100) 鈥?R
1
鈥?C
1
Where:
t
S
= settling time (s)
% = percent accuracy at t
S
R
1
鈥?C
1
= RC time constant (鈩?鈥?F) or (s)
For example, if a settling to 0.01% is needed,
ln(0.01/100) = 鈥?.2
In other words, it takes 9.2 R
1
鈥?C
1
time constants for an input
step to settle to within 0.01% of its final value.
1991 Burr-Brown Corporation

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