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AA1L3M Datasheet

  • AA1L3M

  • COMPOUND TRANSISTOR

  • 4頁(yè)

  • NEC   NEC

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DATA SHEET
COMPOUND TRANSISTOR
AA1L3M
on-chip resistor NPN silicon epitaxial transistor
For mid-speed switching
FEATURES
鈥?On-chip bias resistor
(R
1
= 4.7 k鈩? R
2
= 4.7 k鈩?
鈥?Complementary transistor with AN1L3M
PACKAGE DRAWING (UNIT: mm)
ABSOLUTE MAXIMUM RATINGS (Ta = 25擄C)
擄
Parameter
Collector to base voltage
Collector to emitter voltage
Emitter to base voltage
Collector current (DC)
Collector current (Pulse)
Total power dissipation
Junction temperature
Storage temperature
Symbol
V
CBO
V
CEO
V
EBO
I
C(DC)
I
C(pulse)
*
P
T
T
j
T
stg
Ratings
60
50
10
100
200
250
150
鈭?5
to +150
Unit
V
V
V
mA
mA
mW
擄C
擄C
* PW
鈮?/div>
10 ms, duty cycle
鈮?/div>
50 %
ELECTRICAL CHARACTERISTICS (Ta = 25擄C)
擄
Parameter
Collector cutoff current
DC current gain
DC current gain
Collector saturation voltage
Low level input voltage
High level input voltage
Input resistance
Resistance ratio
Turn-on time
Storage time
Turn-off time
Symbol
I
CBO
h
FE1
**
h
FE2
**
V
CE(sat)
**
V
IL
**
V
IH
**
R
1
R
1
/R
2
t
on
t
stg
t
off
V
CC
= 5 V, R
L
= 1 k鈩?/div>
V
I
= 5 V, PW = 2
碌
s
duty cycle鈮? %
Conditions
V
CB
= 50 V, I
E
= 0
V
CE
= 5.0 V, I
C
= 5.0 mA
V
CE
= 5.0 V, I
C
= 50 mA
I
C
= 5.0 mA, I
B
= 0.25 mA
V
CE
= 5.0 V, I
C
= 100
碌
A
V
CE
= 0.2 V, I
C
= 5.0 mA
3.0
3.28
0.9
20
70
40
140
0.08
1.1
1.5
4.7
1.0
6.11
1.1
0.5
3.0
5.0
0.3
0.8
MIN.
TYP.
MAX.
100
80
Unit
nA
鈭?/div>
鈭?/div>
V
V
V
k鈩?/div>
鈭?/div>
碌
s
碌
s
碌
s
** Pulse test PW
鈮?/div>
350
碌
s, duty cycle
鈮?/div>
2 %
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D16162EJ1V0DS00 (1st edition)
Date Published April 2002 N CP(K)
Printed in Japan
漏
2002
1998

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