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I/O Terminal :Input / Output Common 3-state output
2M X 16 Bit Low Voltage Super RAM
1
A
B
C
D
E
F
G
H
LB#
2
OE#
3
A0
4
A1
5
A2
6
CE2
DQ8
UB#
A3
A4
CE1#
DQ0
DQ9
DQ10
A5
A6
DQ1
DQ2
VSS
DQ11
A17
A7
DQ3
VCC
Pin Description
Pin Name
CS1#
CS2
WE#
OE#
A0 to A20
IO0-7
IO8-15
LB#
UB#
VCC
VSS
Description
Chip select 1 ( Low Active )
Chip select 2 ( High Active )
Write enable ( Low Active )
Output enable ( Low Active )
Address Input ( A0 to A2 : Page Address)
Lower Byte Input / Output
Upper Byte Input / Output
Lower Byte Control ( Low Active )
Upper Byte Control ( Low Active )
Power Supply
Ground ( 0V)
VCC
DQ12
NC
A16
DQ4
VSS
DQ14
DQ13
A14
A15
DQ5
DQ6
DQ15
A19
A12
A13
WE#
DQ7
A18
A8
A9
A10
A11
A20
Description
A64S16161 is a virtually static RAM, which uses DRAM type memory cells, but it has refresh transparency, so that you need
not to imply refresh operation. Furthermore the interface is completely compatible to a low power Asynchronous type SRAM, you
can operate as same as the Asynchronous SRAM.
A64S16161 is a 2,097,152 Words X 16 bit asynchronous random access memory on a monolithic CMOS chip with
marvelous low power consumption technology. Its low power and also low noise makes it ideal for mobile applications.
PRELIMINARY (December, 2003, Version 0.0)
1
AMIC Technology Corp.