A3983_08 Datasheet

IC型號(hào)：
A3983_08
PDF描述：
DMOS Microstepping Driver with Translator
文件大小：
450.94KB
PDF頁(yè)數(shù)：
11頁(yè)
芯片廠家：
ALLEGRO

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A3983

DMOS Microstepping Driver with Translator

Features and Benefits

鈻?/div>

Low R

DS(ON)

outputs

Automatic current decay mode detection/selection

Mixed and Slow current decay modes

Synchronous rectification for low power dissipation

Internal UVLO and thermal shutdown circuitry

Crossover-current protection

Description

The A3983 is a complete microstepping motor driver with

built-in translator for easy operation. It is designed to operate

bipolar stepper motors in full-, half-, quarter-, and eighth-step

modes, with an output drive capacity of up to 35 V and 鹵2 A.

The A3983 includes a fixed off-time current regulator which

has the ability to operate in Slow or Mixed decay modes.

The translator is the key to the easy implementation of the

A3983. Simply inputting one pulse on the STEP input drives

the motor one microstep. There are no phase sequence tables,

high frequency control lines, or complex interfaces to program.

The A3983 interface is an ideal fit for applications where a

complex microprocessor is unavailable or is overburdened.

The chopping control in the A3983 automatically selects the

current decay mode (Slow or Mixed). When a signal occurs at

the STEP input pin, the A3983 determines if that step results

in a higher or lower current in each of the motor phases. If

the change is to a higher current, then the decay mode is set to

Slow decay. If the change is to a lower current, then the current

decay is set to Mixed (set initially to a fast decay for a period

amounting to 31.25% of the fixed off-time, then to a slow

decay for the remainder of the off-time). This current decay

Continued on the next page鈥?/div>

Package: 24-pin TSSOP with exposed thermal pad

(suffix LP)

Not to scale

Functional Block Diagram

0.22

渭F

VREG

ROSC

CP1

0.1

渭F

CP2

VDD

Current

Regulator

OSC

Charge

Pump

VCP

0.1

渭F

DMOS Full Bridge

REF

DAC

VBB1

OUT1A

OUT1B

PWM Latch

Blanking

Mixed Decay

SENSE1

Gate

Drive

VBB2

STEP

DIR

RESET

MS1

MS2

PWM Latch

Blanking

Mixed Decay

DAC

Translator

Control

Logic

DMOS Full Bridge

OUT2A

OUT2B

ENABLE

SLEEP

SENSE2

REF

26184.29B

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