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96LS02 Datasheet

  • 96LS02

  • Dual Retriggerable Resettable Monostable Multivibrator

  • 105.65KB

  • 8頁

  • FAIRCHILD

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DM96LS02 Dual Retriggerable Resettable Monostable Multivibrator
October 1988
Revised March 2000
DM96LS02
Dual Retriggerable Resettable Monostable Multivibrator
General Description
The DM96LS02 is a dual retriggerable and resettable
monostable multivibrator. The one-shot provides excep-
tionally wide delay range, pulse width stability, predictable
accuracy and immunity to noise. The pulse width is set by
an external resistor and capacitor. Resistor values up to 1.0
M鈩?reduce required capacitor values. Hysteresis is pro-
vided on both trigger inputs of the DM96LS02 for increased
noise immunity.
Features
s
Required timing capacitance reduced by factors of 10 to
100 over conventional designs
s
Broad timing resistor range鈥?.0 k鈩?to 2.0 M鈩?/div>
s
Output Pulse Width is variable over a 2000:1 range by
resistor control
s
Propagation delay of 35 ns
s
0.3V hysteresis on trigger inputs
s
Output pulse width independent of duty cycle
s
35 ns to
鈭?/div>
output pulse width range
Ordering Code:
Order Number
DM96LS02M
DM96LS02N
Package Number
M16A
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
Connection Diagram
V
CC
=
Pin 16
GND
=
Pin 8
Pin Descriptions
Pin
Names
I0
I0
I1
C
D
Q
Q
Description
Trigger Input (Active Falling Edge)
Schmitt Trigger Input (Active Falling Edge)
Schmitt Trigger Input (Active Rising Edge)
Direct Clear Input (Active LOW)
True Pulse Output
Complementary Pulse Output
漏 2000 Fairchild Semiconductor Corporation
DS009816
www.fairchildsemi.com

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