<0.015鈩?/div>
I
D
8A
(1)
Improved die-to-footprint ratio
Very low profile package (1mm max)
Very low thermal resistance
Very low gate charge
Low threshold device
In compliance with the 2002/95/EC Europen
directive
PowerFLAT鈩?3.3x3.3)
(Chip Scale Package)
Description
This application specific Power MOSFET is the
latest generation of STMicroelectronics unique
鈥淪TripFET鈩⑩€?technology. The resulting transistor
is optimized for low on-resistance and minimal
gate charge. The Chip-scaled PowerFLAT鈩?/div>
package allows a significant board space saving,
still boosting the performance.
Internal schematic diagram
Applications
鈻?/div>
Switching application
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Order codes
Sales Type
STL8NH3LL
Marking
8NH3L
Package
PowerFLAT鈩?(3.3 x 3.3)
Packaging
Tape & reel
March 2006
Rev 7
1/12
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