音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

89HPES48H12ZABR Datasheet

  • 89HPES48H12ZABR

  • 48-Lane 12-Port PCI Express System Interconnect Switch

  • 48頁

  • IDT

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

48-Lane 12-Port PCI Express廬
System Interconnect Switch
廬
89HPES48H12
Data Sheet
Device Overview
The 89HPES48H12 is a member of the IDT PRECISE鈩?family of
PCI Express廬 switching solutions. The PES48H12 is a 48-lane, 12-port
system interconnect switch optimized for PCI Express packet switching
in high-performance applications, supporting multiple simultaneous
peer-to-peer traffic flows. Target applications include servers, storage,
communications, and embedded systems.
鈼?/div>
Features
鈼?/div>
High Performance PCI Express Switch
鈥?Twelve maximum switch ports
鈥?/div>
Six main ports each of which consists of 8 SerDes
鈥?/div>
Each x8 main port can further bifurcate to 2 x4-ports
鈥?Forty-eight 2.5 Gbps embedded SerDes
鈥?/div>
Supports pre-emphasis and receive equalization on per-port
basis
鈥?Delivers 192 Gbps (24 GBps) of aggregate switching capacity
鈥?Low-latency cut-through switch architecture
鈥?Support for Max Payload Size up to 2048 bytes
鈥?Supports two virtual channels and eight traffic classes
鈥?PCI Express Base Specification Revision 1.1 compliant
鈼?/div>
鈼?/div>
Flexible Architecture with Numerous Configuration Options
鈥?Port arbitration schemes utilizing round robin algorithms
鈥?Virtual channels arbitration based on priority
鈥?Automatic per port link width negotiation to x8, x4, x2 or x1
鈥?Supports automatic lane reversal on all ports
鈥?Supports automatic polarity inversion on all lanes
鈥?Supports locked transactions, allowing use with legacy soft-
ware
鈥?Ability to load device configuration from serial EEPROM
鈥?Ability to control device via SMBus
Highly Integrated Solution
鈥?Requires no external components
鈥?Incorporates on-chip internal memory for packet buffering and
queueing
鈥?Integrates forty-eight 2.5 Gbps embedded full duplex SerDes,
8B/10B encoder/decoder (no separate transceivers needed)
Reliability, Availability, and Serviceability (RAS) Features
鈥?Redundant upstream port failover capability
鈥?Supports optional PCI Express end-to-end CRC checking
鈥?Internal end-to-end parity protection on all TLPs ensures data
integrity even in systems that do not implement end-to-end
CRC (ECRC)
Block Diagram
x8/x4/x2/x1
x8/x4/x2/x1
x8/x4/x2/x1
SerDes
DL/Transaction Layer
SerDes
DL/Transaction Layer
SerDes
DL/Transaction Layer
Route Table
Port
Arbitration
12-Port Switch Core
Frame Buffer
Scheduler
DL/Transaction Layer
DL/Transaction Layer
DL/Transaction Layer
SerDes
SerDes
SerDes
x8/x4/x2/x1
x8/x4/x2/x1
x8/x4/x2/x1
48 PCI Express Lanes
Up to 6 x8 ports or 12 x4 Ports
Figure 1 Internal Block Diagram
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
1 of 48
漏
2007 Integrated Device Technology, Inc.
July 19, 2007
DSC 6925

89HPES48H12ZABR 產(chǎn)品屬性

  • 0現(xiàn)貨

  • 停產(chǎn)

  • PRECISE?

  • 托盤

  • 停產(chǎn)

  • 開關(guān)接口

  • PCI Express

  • 3.3V

  • 1156-BBGA，F(xiàn)CBGA

  • 1156-FCBGA（35x35）

  • 表面貼裝型

89HPES48H12ZABR相關(guān)型號PDF文件下載

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時間周一至周五
9:00-17:30

關(guān)注官方微信號，
第一時間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動力！意見一經(jīng)采納，將有感恩紅包奉上哦！