音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

89HPES12NT3ZABCG Datasheet

  • 89HPES12NT3ZABCG

  • 12-lane 3-Port Non-Transparent PCI Express㈢ Switch

  • 29頁

  • IDT

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

12-lane 3-Port Non-Transparent
PCI Express廬 Switch
廬
89HPES12NT3
Data Sheet
Preliminary Information*
Device Overview
The 89HPES12NT3 is a member of the IDT PRECISE鈩?family of
PCI Express廬 switching solutions offering the next-generation I/O inter-
connect standard. The PES12NT3 is a 12-lane, 3-port peripheral chip
that performs PCI Express Base switching with a feature set optimized
for high performance applications such as servers, storage, and commu-
nications/networking. It provides high-performance I/O connectivity and
switching functions between a PCIe廬 upstream port, a transparent
downstream port, and a non-transparent downstream port.
With non-transparent bridging (NTB) functionality, the PES12NT3
can be used standalone or as a chipset with IDT PCIe System Intercon-
nect Switches in multi-host and intelligent I/O applications such as
communications, storage, and blade servers where inter-domain
communication is required.
Features
鈼?/div>
High Performance PCI Express Switch
鈥?/div>
Twelve PCI Express lanes (2.5Gbps), three switch ports
鈥?/div>
Delivers 48 Gbps (6 GBps) of aggregate switching capacity
鈥?/div>
Low latency cut-through switch architecture
鈥?/div>
Support for Max Payload size up to 2048 bytes
鈥?/div>
Supports one virtual channel and eight traffic classes
鈥?/div>
PCI Express Base specification Revision 1.0a compliant
Flexible Architecture with Numerous Configuration Options
鈥?/div>
Port arbitration schemes utilizing round robin
鈥?/div>
Supports automatic per port link width negotiation (x4, x2, or
x1)
鈥?/div>
Static lane reversal on all ports
鈥?/div>
Automatic polarity inversion on all lanes
鈥?/div>
Supports locked transactions, allowing use with legacy soft-
ware
鈥?/div>
Ability to load device configuration from serial EEPROM
鈥?/div>
Ability to control device via SMBus
鈼?/div>
Non-Transparent Port
鈥?/div>
Crosslink support on NTB port
鈥?/div>
Four mapping windows supported
鈥?/div>
Each may be configured as a 32-bit memory or I/O window
鈥?/div>
May be paired to form a 64-bit memory window
鈥?/div>
Interprocessor communication
鈥?/div>
Thirty-two inbound and outbound doorbells
鈥?/div>
Four inbound and outbound message registers
鈥?/div>
Two shared scratchpad registers
鈥?/div>
Allows up to sixteen masters to communicate through the non-
transparent port
鈥?/div>
No limit on the number of supported outstanding transactions
through the non-transparent bridge
鈥?/div>
Completely symmetric non-transparent bridge operation
allows similar/same configuration software to be run
鈥?/div>
Supports direct connection to a transparent or non-transparent
port of another switch
鈼?/div>
Block Diagram
3-Port Switch Core
Frame Buffer
Route Table
Port
Arbitration
Scheduler
Transaction Layer
Data Link Layer
Transaction Layer
Data Link Layer
Transaction Layer
Data Link Layer
Non-
Transparent
Bridge
Multiplexer / Demultiplexer
Phy
Logical
Layer
Phy
Logical
Layer
Phy
Logical
Layer
Multiplexer / Demultiplexer
Phy
Logical
Layer
Phy
Logical
Layer
Phy
Logical
Layer
Multiplexer / Demultiplexer
Phy
Logical
Layer
Phy
Logical
Layer
Phy
Logical
Layer
...
...
...
SerDes
SerDes
SerDes
SerDes
SerDes
SerDes
SerDes
SerDes
SerDes
12 PCI Express Lanes
x4 Upstream Port and Two x4 Downstream Ports
Figure 1 Internal Block Diagram
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
Inc.
1 of 29
漏
2007 Integrated Device Technology, Inc.
*Notice: The information in this document is subject to change without notice
April 11, 2007
DSC 6929

89HPES12NT3ZABCG相關(guān)型號PDF文件下載

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時間周一至周五
9:00-17:30

關(guān)注官方微信號，
第一時間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動力！意見一經(jīng)采納，將有感恩紅包奉上哦！