DIGITAL AUDIO PROCESSOR WITH MULTICHANNEL DDX鈩?/div>
PRODUCT PREVIEW
s
s
s
s
s
s
s
s
s
STA304AEND TO END DIGITAL AUDIO
INTEGRATED SOLUTION
路 DSP Functions:
- DIGITAL VOLUME CONTROL
- SOFT MUTE
- BASS and TREBLE
- PARAMETRIC EQ PER CHANNEL
- BASS MANAGEMENT FOR SUBWOOFER
- AUTO MUTE ON ZERO INPUT DETECTION
4+1 DIRECT DIGITAL AMPLIFICATION
(DDX鈩? OUTPUT CHANNELs
6 CHANNELs PROGRAMMABLE SERIAL
OUTPUT INTERFACE (by default I2S)
4 CHANNELs PROGRAMMABLE SERIAL
INPUT INTERFACE (by default I2S)
STEREO S/PDIF INPUT INTERFACE
Intel AC'97 LINK (rev. 2.1) INPUT INTERFACE
FOR AUDIO AND CONTROL
ON CHIP AUTOMATIC INPUT SAMPLING
FREQUENCY DETECTION
100 dB SNR SAMPLE RATE CONVERTER
(1KHz SINUSOIDAL INPUT)
I
2
C CONTROL BUS
LOW POWER 3.3V CMOS TECHNOLOGY
TQFP44
ORDERING NUMBER: STA304A
s
s
s
EMBEDDED PLL FOR INTERNAL CLOCK
GENERATION (1024x48 kHz = 49.152 MHz)
6.144 MHz EXTERNAL INPUT CLOCK OR
BUILT-IN INDUSTRY STANDARD XTAL
OSCILLATOR
VARIABLE DIGITAL GAIN UP TO 24dB
(0.75dB STEP)
1.0 DESCRIPTION
The STA304A Digital Audio Processor is a single
chip device implementing end to end digital solution
for audio application. In conjunction with STA500
power bridge it gives the full digital DSP-to-power
high quality chain with no need for audio Digital-to-
Analog converters between DSP and power stage.
s
s
BLOCK DIAGRAM
SA
11
SCL
10
SDA
9
LRCKI / SYNC
BICKI / BIT_CL
3
4
29
LEFT_A
LEFT_B
RIGHT_A
RIGHT_B
SLEFT_A
SLEFT_B
SRIGHT_A
SRIGHT_B
LFE_A
LFE_B
I2C
I2S
ROM
DDX
30
27
28
33
34
23
SDI_1 / SDATA_OUT 1
SDI_2 / SDATA_IN 2
RXP
RXN
24
18
19
S/PDIF
SRC
DSP
21
22
43
43
LRCKO
BICKO
I2S
43
SDO_1
SDO_2
SDO_3
RAM
AC`97
43
43
RESET
7
PLL
PowerDown
35
EAPD
14
XTI
15
XTO
43
CKOUT
44
PWDN
March 2002
This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.
1/30