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8101801EA Datasheet

  • 8101801EA

  • CMOS Analog Multiplexers/Demultiplexers with Logic Level Con...

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  • TI

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CD4051B, CD4052B, CD4053B
Data sheet acquired from Harris Semiconductor
SCHS047G
August 1998 - Revised October 2003
Features
鈥?Wide Range of Digital and Analog Signal Levels
- Digital . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 20V
- Analog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
鈮?0V
P-P
The CD4051B is a single 8-Channel multiplexer having three
binary control inputs, A, B, and C, and an inhibit input. The
three binary signals select 1 of 8 channels to be turned on,
and connect one of the 8 inputs to the output.
The CD4052B is a differential 4-Channel multiplexer having
two binary control inputs, A and B, and an inhibit input. The
two binary input signals select 1 of 4 pairs of channels to be
turned on and connect the analog inputs to the outputs.
The CD4053B is a triple 2-Channel multiplexer having three
separate digital control inputs, A, B, and C, and an inhibit
input. Each control input selects one of a pair of channels
which are connected in a single-pole, double-throw
con鏗乬uration.
When these devices are used as demultiplexers, the
鈥淐HANNEL IN/OUT鈥?terminals are the outputs and the
鈥淐OMMON OUT/IN鈥?terminals are the inputs.
[ /Title
(CD405
鈥?High OFF Resistance, Channel Leakage of
鹵100pA
(Typ)
1B,
CD4052
at V
DD
-V
EE
= 18V
鈥?Logic-Level Conversion for Digital Addressing Signals of
B,
(V
DD
CD4053
3V to 20V 20V -V
SS
= 3V to 20V) to Switch Analog
Signals to
P-P
(V
DD
-V
EE
= 20V)
B)
鈥?Matched Switch Characteristics, r
ON
= 5鈩?(Typ) for
/Sub-
V
DD
-V
EE
= 15V
ject
(CMOS
鈥?Very Low Quiescent Power Dissipation Under All Digital-
Control Input and Supply Conditions, 0.2碌W (Typ) at
Analog
V
DD
-V
SS
= V
DD
-V
EE
= 10V
Multi-
鈥?Binary Address Decoding on Chip
plex-
ers/Dem
鈥?5V, 10V, and 15V Parametric Ratings
ultiplex-
鈥?100% Tested for Quiescent Current at 20V
ers with
鈥?Maximum Input Current of 1碌A(chǔ) at 18V Over Full Package
Temperature Range, 100nA at 18V and 25
o
C
Logic
Level
鈥?Break-Before-Make Switching Eliminates Channel
Overlap
Conver-
sion)
/Author
Applications
鈥?Analog and Digital Multiplexing and Demultiplexing
()
/Key-
鈥?A/D and D/A Conversion
words
鈥?Signal Gating
(Harris
CMOS Analog Multiplexers/Demultiplexers
Semi-
conduc-
with Logic Level Conversion
tor,
The CD4051B, CD4052B, and CD4053B analog multiplexers
CD4000
are digitally-controlled analog switches having low ON
鈥?Low ON Resistance, 125鈩?(Typ) Over 15V
P-P
Signal Input
Range for V
DD
-V
EE
= 18V
Ordering Information
PART NUMBER
CD4051BF3A, CD4052BF3A,
CD4053BF3A
CD4051BE, CD4052BE,
CD4053BE
CD4051BM, CD4051BMT,
CD4051BM96
CD4052BM, CD4052BMT,
CD4052BM96
CD4053BM, CD4053BMT,
CD4053BM96
CD4051BNSR, CD4052BNSR,
CD4053BNSR
CD4051BPW, CD4051BPWR,
CD4052BPW, CD4052BPWR
CD4053BPW, CD4053BPWR
TEMP. RANGE
(
o
C)
-55 to 125
-55 to 125
-55 to 125
PACKAGE
16 Ld CERAMIC
DIP
16 Ld PDIP
16 Ld SOIC
-55 to 125
-55 to 125
16 Ld SOP
16 Ld TSSOP
NOTE: When ordering, use the entire part number. The suf鏗亁es 96
and R denote tape and reel. The suf鏗亁 T denotes a small-quantity
reel of 250.
impedance and very low OFF leakage current. Control of
analog signals up to 20V
P-P
can be achieved by digital
signal amplitudes of 4.5V to 20V (if V
DD
-V
SS
= 3V, a
V
DD
-V
EE
of up to 13V can be controlled; for V
DD
-V
EE
level
differences above 13V, a V
DD
-V
SS
of at least 4.5V is
required). For example, if V
DD
= +4.5V, V
SS
= 0V, and
V
EE
= -13.5V, analog signals from -13.5V to +4.5V can be
controlled by digital inputs of 0V to 5V. These multiplexer
circuits dissipate extremely low quiescent power over the
full V
DD
-V
SS
and V
DD
-V
EE
supply-voltage ranges,
independent of the logic state of the control signals. When
a logic 鈥?鈥?is present at the inhibit input terminal, all
channels are off.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Copyright
漏
2003, Texas Instruments Incorporated

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