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80C03

80C03

AutoDUPLEX

TM

CMOS Ethernet

Data Link Controller

96253

Features

s

Low Power CMOS Technology

s

Optimized for Embedded Ethernet Applications

s

Meets ANSI/IEEE 802.3 and ISO 8802-3 Standards

for Ethernet (10Base-5) Thin Net (10Base-2)

(10Base-T) and Twisted Pair

s

10 MHz Serial/Parallel Conversion

s

Preamble Generation and Removal

s

Automatic 32-Bit FCS (CRC) Generation and

Checking

s

Collision Handling, Transmission Deferral and

Retransmission with Automatic Jam and

Backoff Functions

s

Error Interrupt and Status Generation

s

Available as 鈥淓thernet Core鈥?for Custom ASIC

Applications

s

Single 5 V

鹵

10% Power Supply

s

Standard CPU and Peripheral Interface

Control Signals

s

Loopback Capability for Diagnostics

s

Single Phase Clock

s

Inputs and Outputs TTL Compatible

Note: Check for latest Data Sheet revision

before starting any designs.

SEEQ Data Sheets are now on the Web, at

www.lsilogic.com.

This document is an LSI Logic document. Any

reference to SEEQ Technology should be

considered LSI Logic.

s

Compatible with SEEQ 8003 and Provides

Additional Features

- 64 bit Multicast Filter

- Transmit Collision Counter

- Total Collision Counter

- Reports Status of 鈥淐arrier鈥?and 鈥淪QE鈥?During

Transmits

- Transmit No CRC Mode

- Transmit No Preamble Mode

- Transmit Packet Autopadding Mode

- Receive CRC Mode

- Receive Own Transmit Disable Mode

- Group Address Mode

- Fast Receive Discard Mode

- Full Duplex Mode

s

Supports AutoDUPLEX Mode for Automatic Full

Duplex Operation鈥?Provides 20 MBits/sec

Bandwidth for Switched Networks

s

40 Pin DIP Package, 44 Pin PLCC

Functional Block Diagram

TxD

TRANSMIT

BYTE

COUNTER

ENCODER

INTERFACE

ATTEMPT

COUNTER

TRANSMIT

BYTE

CONTROL

BACKOFF

CONTROLLER

CONTROL

REGISTER

FILE

A2

A1

A0

CS

RD

WR

INT

INTERRUPT R x DC

AND

CONTROL T x RET

CdSt (0 鈥?7)

CRC

GENERATOR

PARALLEL

/SERIAL

M

U

X

COMMAND/

STATUS

INTERFACE

COLL

TxEN

TxWR

TxRDY

DATA

INTERFACE

RxTxD (0 鈥?7)

16-BYTE

TRANSMIT

FIFO

CRC

CHECKER

CRC

STRIPPER

SERIAL

/PARALLEL

RECEIVE BIT

CONTROL

PLA

RESET

CSN

RxD

DECODER

INTERFACE

RxTxEOF

16-BYTE

RECEIVE

FIFO

RxRDY

RxRD

ADDRESS

CHECKER

RECEIVE

COUNTER

AutoDUPLEX is a trademark of SEEQ Technology Inc.

RECEIVE

BYTE

CONTROL

RxC

CLOCK

DRIVERS

TxC

4-1

1

MD400121/C

next

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