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78P2254 Datasheet

  • 78P2254

  • OC-3 / STM-1 / STS-3 / E4 Transceivers

  • 18頁(yè)

  • ETC

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78P2254
STM-1/STS-3
Transceiver
JUNE 2002
DESCRIPTION
The 78P2254 is a transceiver IC designed for
155.52Mbit/s (STS-3 or STM-1) transmission. It is
used at the interface to a 75鈩?coaxial cable using
CMI coding. Interfacing to digital framer circuits is
accomplished via a serial PECL or parallel CMOS
interfaces.
The transmitter includes a PLL to multiply the
reference clock to the transmission frequency. The
receiver provides adaptive equalization for accurate
clock and data recovery. The 78P2254 is built in a
BiCMOS technology for high performance and low
power operation. It operates with a 3.3V or 5V power
supply and is packaged in a 64-pin TQFP.
FEATURES
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155.52Mbit/s interface for CMI coded
transmission using 75鈩?coaxial cable
鈩?/div>
Compliant with ITU-T G.703 and Telcordia
TR-NWT-00253
Integrated Clock Recovery Unit (CRU)
Serial PECL Interface to Framer
Four and Eight bit Parallel CMOS Interfaces
to Framer
Synchronous 311MHz clock generated by
transmit PLO
Adaptive Equalization
Integrated Clock Multiplier PLL
Advanced BiCMOS Process
BLOCK DIAGRAM
HUB/HOST
PAR/SER
XTAL1
XTAL2
8BIT/$BIT
TX311P,N
CKIN
Crystal
Oscillator
Clock
Generator
CMIOUTP
Binary
to CMI
CMIOUTN
TXCK
TXCKP,N
RLBACK
TXDTP,N
TXDT[7:0]
RXDTP,N
RXDT[7:0]
CMI to
Binary
Clock
Recovery
Adaptive
Equalizer
CMIINP
CMIINN
RXCKP,N
RXCK
Signal
Detector
Bias
LLBACK
RFO
LOS
LF

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