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74VHCT273AT Datasheet

  • 74VHCT273AT

  • OCTAL D-TYPE FLIP FLOP WITH CLEAR

  • STMICROELECTRONICS   STMICROELECTRONICS

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74VHCT273A
OCTAL D-TYPE FLIP FLOP WITH CLEAR
s
s
s
s
s
s
s
s
s
s
HIGH SPEED:
f
MAX
= 170 MHz (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 4
碌A(chǔ)
(MAX.) at T
A
= 25
o
C
COMPATIBLE WITH TTL OUTPUTS:
V
IH
= 2V (MIN), V
IL
= 0.8V (MAX)
POWER DOWN PROTECTION ON INPUTS &
OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8 mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
鈮?/div>
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 273
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
OLP
= 0.9V (Max.)
M
(Micro Package)
T
(TSSOP Package)
ORDER CODES :
74VHCT273AM
74VHCT273AT
technology.
Information signals applied to D inputs are
transfered to the Q outputs on the positive going
edge of the clock pulse.
When the CLEAR input is held low, the Q outputs
are held low independently of the other inputs .
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
DESCRIPTION
The 74VHCT273A is an advanced high-speed
CMOS OCTAL
D-TYPE FLIP FLOP WITH
CLEAR fabricated with sub-micron silicon gate
and
double-layer metal
wiring
C
2
MOS
PIN CONNECTION AND IEC LOGIC SYMBOLS
November 1999
1/9

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