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74VHCT257AM Datasheet

  • 74VHCT257AM

  • QUAD 2 CHANNEL MULTIPLEXER 3-STATE

  • 10頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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74VHCT257A
QUAD 2 CHANNEL MULTIPLEXER (3-STATE)
PRELIMINARY DATA
s
s
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 5.8 ns (TYP.) at V
CC
= 5V
LOWPOWER DISSIPATION:
I
CC
= 4
碌A(chǔ)
(MAX.) at T
A
= 25
o
C
COMPATIBLE WITH TTL OUTPUTS:
V
IH
= 2V (MIN), V
IL
= 0.8V (MAX)
POWER DOWN PROTECTION ON INPUTS &
OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8 mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
鈮?/div>
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 257
IMPROVED LATCH-UP IMMUNITY
LOWNOISE: V
OLP
= 0.8V (Max.)
SOP
PACKAGE
SOP
TSSOP
T UBE
74VHCT257AM
TSSOP
T& R
74VHCT257AMTR
74VHCT257ATTR
ORDER CODES
DESCRIPTION
The 74VHCT257A is an advanced high-speed
CMOS QUAD 2 CHANNEL MULTIPLEXER
(3-STATE) fabricated with sub-micron silicon gate
and
double-layer metal
wiring
C
2
MOS
technology.
It is composed of four independent 2 channel
multiplexers with common SELECT and ENABLE
INPUT.
PIN CONNECTION AND IEC LOGIC SYMBOLS
The 74VHCT257A is a non inverting multiplexer.
When the ENABLE INPUT is held 鈥滺igh鈥? all
outputs become high impedance state. If
SELECT INPUT is held 鈥滾ow鈥? 鈥滱鈥?data is
selected, when SELECT INPUT is 鈥滺igh鈥? 鈥滲鈥?/div>
data is chosen.
Power down protection is provided on all inputs
and output and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
March 2000
1/9

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