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74VHCT16240A Datasheet

  • 74VHCT16240A

  • 16-BIT BUS BUFFER WITH 3-STATE OUTPUTS (INVERTED)

  • 10頁

  • ETC

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74VHCT16240A
16-BIT BUS BUFFER
WITH 3-STATE OUTPUTS (INVERTED)
s
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 5.6 ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 4
碌A(chǔ)
(MAX.) at T
A
=25擄C
COMPATIBLE WITH TTL OUTPUTS:
V
IH
= 2V (MIN.), V
IL
= 0.8V (MAX)
POWER DOWN PROTECTION ON INPUTS
& OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8 mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
鈮?/div>
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
OLP
= 0.9V (MAX.)
TSSOP
ORDER CODES
PACKAGE
TSSOP
TUBE
T&R
74VHCT16240ATTR
PIN CONNECTION
DESCRIPTION
The 74VHCT16240A is an advanced high-speed
CMOS 16-BIT BUS BUFFER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS technology.
Any nG output control governs four BUS
BUFFERS. Output Enable inputs (nG) tied
together give full 16 bit operation.
When nG is LOW, the outputs are on. When nG is
HIGH, the output are in high impedance state.
This device is designed to be used with 3 state
memory address drivers, etc.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V since all
inputs are equipped with TTL threshold
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
February 2003
1/10

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