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74VHCT157ATTR Datasheet

  • 74VHCT157ATTR

  • QUAD 2 CHANNEL MULTIPLEXER

  • 9頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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廬
74VHCT157A
QUAD 2 CHANNEL MULTIPLEXER
PRELIMINARY DATA
s
s
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 6.2 ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 4
碌A(chǔ)
(MAX.) at T
A
= 25
o
C
COMPATIBLE WITH TTL OUTPUTS:
V
IH
= 2V (MIN), V
IL
= 0.8V (MAX)
POWER DOWN PROTECTION ON INPUTS &
OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8 mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
鈮?/div>
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 157
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
OLP
= 0.8V (Max.)
SOP
PACKAGE
SOP
TSSOP
T UBE
74VHCT157AM
TSSOP
T& R
74VHCT157AMTR
74VHCT157ATTR
ORDER CODES
DESCRIPTION
The 74VHCT157A is an high-speed CMOS
QUAD 2-CHANNEL MULTIPLEXER fabricated
with sub-micron silicon gate and double-layer
metal wiring C
2
MOS technology.
It consists of four 2-input digital multiplexers with
common select and strobe inputs. It is a
non-inverting multiplexer. When the STROBE
input is held high, selection of data is inhibited
and all the outputs become low. The SELECT
decoding determines whether the A or B inputs
get routed to their corresponding Y outputs.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V.All
inputs and outputs are equipped with protection
circuits against static discharge, giving them 2KV
ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
March 2000
1/9

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