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t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 04
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
OLP
= 0.8V (Max.)
M
(Micro Package)
T
(TSSOP Package)
ORDER CODES :
74VHCT04AM
74VHCT04AT
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
DESCRIPTION
The 74VHCT04A is an advanced high-speed
CMOS HEX INVERTER fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
PIN CONNECTION AND IEC LOGIC SYMBOLS
August 1999
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