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74VHCT03AT Datasheet

  • 74VHCT03AT

  • QUAD 2-INPUT OPEN DRAIN NAND GATE

  • STMICROELECTRONICS   STMICROELECTRONICS

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74VHCT03A
QUAD 2-INPUT OPEN DRAIN NAND GATE
s
s
s
s
s
s
s
s
HIGH SPEED: t
PZ
= 3.9 ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 2
碌A(chǔ)
(MAX.) at T
A
=25擄C
COMPATIBLE WITH TTL OUTPUTS:
V
IH
= 2V (MIN.), V
IL
= 0.8V (MAX)
POWER DOWN PROTECTION ON INPUTS
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 03
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
OLP
= 0.8V (MAX.)
SOP
TSSOP
ORDER CODES
PACKAGE
SOP
TSSOP
TUBE
74VHCT03AM
T&R
74VHCT03AMTR
74VHCT03ATTR
DESCRIPTION
The 74VHCT03A is an advanced high-speed
CMOS QUAD 2-INPUT OPEN DRAIN NAND
GATE fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which provides high noise
immunity and stable output.
This device can, with an external pull-up resistor,
be used in wired AND configuration. This device
can also be used as a led driver and in any other
application requiring a current sink.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V since all inputs are
equipped with TTL threshold.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 2001
1/8

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