音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

74VHC74T Datasheet

  • 74VHC74T

  • DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR

  • 10頁

  • STMICROELECTRONICS   STMICROELECTRONICS

掃碼查看芯片數(shù)據(jù)手冊

上傳產品規(guī)格書

PDF預覽

廬
74VHC74
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
s
s
s
s
s
s
s
s
s
HIGH SPEED:
f
MAX
=170 MHz (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 2
碌A
(MAX.) at T
A
= 25
o
C
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28% V
CC
(MIN.)
POWER DOWN PROTECTION ON INPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8 mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
鈮?/div>
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 74
IMPROVED LATCH-UP IMMUNITY
M
(Micro Package)
T
(TSSOP Package)
ORDER CODES :
74VHC74M
74VHC74T
CLEAR and PRESET are independent of the
clock and accomplished by a low setting on the
appropriate input.
It is ideal for low power applications maintaining
high speed operation similar to equivalent Bipolar
Schottky TTL.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
DESCRIPTION
The 74VHC74 is an advanced high-speed CMOS
DUAL D-TYPE FLIP FLOP WITH PRESET AND
CLEAR fabricated with sub-micron silicon gate
and
double-layer metal
wiring
C
2
MOS
technology.
A signal on the D INPUT is transfered to the Q
OUTPUT during the positive going transition of
the clock pulse.
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 1999
1/10

74VHC74T相關型號PDF文件下載

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務：
賣家服務：
技術客服：

0571-85317607

網站技術支持

13606545031

客服在線時間周一至周五
9:00-17:30

關注官方微信號，
第一時間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務的動力！意見一經采納，將有感恩紅包奉上哦！