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74VHC257MTR Datasheet

  • 74VHC257MTR

  • QUAD 2 CHANNEL MULTIPLEXER 3-STATE

  • 15頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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74VHC257
QUAD 2 CHANNEL MULTIPLEXER (3-STATE)
s
s
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 3.7ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 4
碌A(chǔ)
(MAX.) at T
A
=25擄C
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28% V
CC
(MIN.)
POWER DOWN PROTECTION ON INPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
鈮?/div>
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 257
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
OLP
= 0.8V (MAX.)
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
T&R
74VHC257MTR
74VHC257TTR
DESCRIPTION
The 74VHC257 is an advanced high-speed
CMOS QUAD 2-CHANNEL MULTIPLEXER
(3-STATE) fabricated with sub-micron silicon gate
and double-layer metal wiring C
2
MOS technology.
It is composed of four independent 2-channel
multiplexers with common SELECT and ENABLE
(OE) INPUT. The VHC257 is a non-inverting
multiplexer. When the ENABLE INPUT is held
"High", all outputs become in high impedance
state. If SELECT INPUT is held "Low", "A" data is
selected, when SELECT INPUT is "High", "B" data
is chosen.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Figure 1: Pin Connection And IEC Logic Symbols
November 2004
Rev. 4
1/14

74VHC257MTR 產(chǎn)品屬性

  • 2,500

  • 集成電路 (IC)

  • 邏輯 - 信號開關(guān)，多路復(fù)用器，解碼器

  • 74VHC

  • 多路復(fù)用器

  • 4 x 2:1

  • 1

  • 8mA，8mA

  • 單電源

  • 2 V ~ 5.5 V

  • -55°C ~ 125°C

  • 表面貼裝

  • 16-SOIC（0.154"，3.90mm 寬）

  • 16-SOP

  • 帶卷 (TR)

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