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74VHC16244 Datasheet

  • 74VHC16244

  • 16-BIT BUS BUFFER WITH 3-STATE OUTPUTS (NON INVERTED)

  • 10頁

  • ETC

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74VHC16244
16-BIT BUS BUFFER
WITH 3-STATE OUTPUTS (NON INVERTED)
s
s
s
s
s
s
s
s
s
s
HIGH SPEED:
t
PD
= 5.4 ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 4
碌A(chǔ)
(MAX.) at T
A
=25擄C
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28% V
CC
(MIN.)
POWER DOWN PROTECTION ON INPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8 mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
鈮?/div>
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16244
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
OLP
= 0.9V (MAX.)
TSSOP
ORDER CODES
PACKAGE
TSSOP
TUBE
T&R
74VHC16244TTR
PIN CONNECTION
DESCRIPTION
The 74VHC16244 is an advanced high-speed
CMOS 16-BIT BUS BUFFER (3-STATE) fabricat-
ed with sub-micron silicon gate and double-layer
metal wiring C
2
MOS tecnology.
Any nG output control governs four BUS
BUFFERS. Output Enable inputs (nG) tied
together give full 16 bit operation.
When nG is LOW, the outputs are enabled. When
nG is HIGH, the output are in high impedance
state.
The device is designed to be used with 3-state
memory address drivers, etc.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no re-
gard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
2KV ESD immunity and transient excess voltage.
February 2003
1/10

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