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74VCXH16373T Datasheet

  • 74VCXH16373T

  • LATCH|DUAL|8-BIT|VCX-CMOS|TSSOP|48PIN|PLASTIC

  • 85.71KB

  • 10頁

  • ETC

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74VCXH16373
LOW VOLTAGE 16-BIT D-TYPE LATCH (3-STATE)
WITH 3.6V TOLERANT INPUTS AND OUTPUTS
PRELIMINARY DATA
s
s
s
s
s
s
s
s
3.6V TOLERANT INPUTS AND OUTPUTS
HIGH SPEED:
t
PD
= 3.0 ns (MAX.) at V
CC
= 3.0 to 3.6V
t
PD
= 3.4 ns (MAX.) at V
CC
= 2.3 to 2.7V
POWER-DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24 mA (MIN) at V
CC
= 3.0V
|I
OH
| = I
OL
= 18 mA (MIN) at V
CC
= 2.3V
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2.3V to 3.6V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16373
LATCH-UP PERFORMANCE EXCEEDS 300mA
ESD PERFORMANCE:
HBM >2000V; MM > 200V
T
(TSSOP48 Package)
ORDER CODES :
74VCXH16373T
PIN CONNECTION
DESCRIPTION
The VCXH16373 is a low voltage CMOS 16-BIT
D-TYPE LATCH with 3 STATE OUTPUTS NON
INVERTING fabricated with sub-micron silicon
gate and five-layer metal wiring C
2
MOS
technology. It is ideal for low power and very high
speed 2.3 to 3.6V applications; it can be
interfaced to 3.6V signal enviroment for both
inputs and outputs.
These 16 bit D-Type latchs are byte controlled by
two latch enable inputs (nLE) and two output
enable inputs (OE).
While the nLE input is held at a high level, the nQ
outputs will follow the data input precisely.
When the nLE is taken low, the nQ outputs will be
latched precisely at the logic level of D input data.
While the (nOE) input is low, the nQ outputs will
be in a normal logic state (high or low logic level)
and while high level the outputs will be in a high
impedance state.
This device is designed to be used with 3 state
memory address drivers, etc. Bus hold on data
inputs is provided in order to eliminate te need for
external pull-up or pull-down resistor.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
December 1999
1/10

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