74VCXH16244 Low Voltage 16-Bit Buffer/Line Driver with Bushold
November 1999
Revised March 2002
74VCXH16244
Low Voltage 16-Bit Buffer/Line Driver with Bushold
General Description
The VCXH16244 contains sixteen non-inverting buffers
with 3-STATE outputs to be employed as a memory and
address driver, clock driver, or bus oriented transmitter/
receiver. The device is nibble (4-bit) controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The VCXH16244 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
The 74VCXH16244 is designed for low voltage (1.4V to
3.6V) V
CC
applications with output capability up to 3.6V.
The 74VCXH16244 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s
1.4V to 3.6V V
CC
supply operation
s
3.6V tolerant control inputs and outputs
s
Bushold on data inputs eliminating the need for external
pull-up/pull-down resistors
s
t
PD
2.5 ns max for 3.0V to 3.6V V
CC
s
Static Drive (I
OH
/I
OL
)
鹵
24 mA @ 3.0V V
CC
s
Uses patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 300 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
s
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Ordering Code:
Order Number
74VCXH16244GX
(Note 1)
74VCXH16244MTD
(Note 2)
Package Number
BGA54A
(Preliminary)
MTD48
Package Description
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 1:
BGA package available in Tape and Reel only.
Note 2:
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
漏 2002 Fairchild Semiconductor Corporation
DS500230
www.fairchildsemi.com