74VCX162373
Low-Voltage 1.8/2.5/3.3V
16-Bit Transparent Latch
With 26W Series Resisters and
3.6V鈥揟olerant Inputs and Outputs
(3鈥揝tate, Non鈥揑nverting)
The 74VCX162373 is an advanced performance, non鈥搃nverting 16鈥揵it
transparent latch. It is designed for very high鈥搒peed, very low鈥損ower
operation in 1.8 V, 2.5 V or 3.3 V systems. The VCX162373 is byte
controlled, with each byte functioning identically, but independently.
Each byte has separate Output Enable and Latch Enable inputs. These
control pins can be tied together for full 16鈥揵it operation.
When operating at 2.5 V (or 1.8 V) the part is designed to tolerate
voltages it may encounter on either inputs or outputs when interfacing to
3.3 V busses. It is guaranteed to be over鈥搗oltage tolerant to 3.6 V.
The 74VCX162373 contains 16 D鈥搕ype latches with 3鈥搒tate 3.6
V鈥搕olerant outputs. It is designed with 26W series resistors in each of the
outputs to reduce noise. When the Latch Enable (LEn) inputs are HIGH,
data on the Dn inputs enters the latches. In this condition, the latches are
transparent, (a latch output will change state each time its D input
changes). When LE is LOW, the latch stores the information that was
present on the D inputs a setup time preceding the HIGH鈥搕o鈥揕OW
transition of LE. The 3鈥搒tate outputs are controlled by the Output Enable
(OEn) inputs. When OE is LOW, the outputs are enabled. When OE is
HIGH, the standard outputs are in the high impedance state, but this does
not interfere with new data entering into the latches.
http://onsemi.com
MARKING DIAGRAM
48
48
74VCX162373DT
1
AWLYYWW
TSSOP鈥?8
DT SUFFIX
CASE 1201
1
A
WL
YY
WW
= Assembly Location
= Wafer Lot
= Year
= Work Week
鈥?/div>
Designed for Low Voltage Operation: V
CC
= 1.65鈥?.6 V
鈥?/div>
3.6 V Tolerant Inputs and Outputs
鈥?/div>
High Speed Operation: 3.3 ns max for 3.0 to 3.6 V
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
4.5 ns max for 2.3 to 2.7 V
9.0 ns max for 1.65 to 1.95 V
Static Drive:
鹵12
mA Drive at 3.0 V
鹵8
mA Drive at 2.3 V
鹵3
mA Drive at 1.65 V
Supports Live Insertion and Withdrawal
I
OFF
Specification Guarantees High Impedance When V
CC
= 0 V
Near Zero Static Supply Current in All Three Logic States (20
碌A(chǔ))
Substantially Reduces System Power Requirements
Latchup Performance Exceeds
鹵300
mA @ 125擄C
ESD Performance: Human Body Model >2000 V; Machine Model >200 V
ORDERING INFORMATION
Device
74VCX162373DT
74VCX162373DTR
Package
TSSOP
TSSOP
Shipping
39 / Rail
2500 / Reel
漏
Semiconductor Components Industries, LLC, 2000
1
August, 2000 鈥?Rev. 0
This Material Copyrighted by Its Respective Manufacturer
Publication Order Number:
74VCX162373/D
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