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74V2T08STR Datasheet

  • 74V2T08STR

  • DUAL 2-INPUT AND GATE

  • 7頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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74V2T08
DUAL 2-INPUT AND GATE
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 3.8ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 1碌A(chǔ)(MAX.) at T
A
= 25擄C
COMPATIBLE WITH TTL OUTPUTS
V
IH
= 2V (MIN), V
IL
= 0.8V (MAX)
POWER DOWN PROTECTION ON INPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8mA (MIN) at V
CC
= 4.5V
BALANCED PROPAGATION DELAYS:
t
PLH
鈮?/div>
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
IMPROVED LATCH-UP IMMUNITY
SOT23-8L
ORDER CODES
PACKAGE
SOT23-8L
T&R
74V2T08STR
DESCRIPTION
The 74V2T08 is an advanced high-speed CMOS
DUAL 2-INPUT AND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
The internal circuit is composed of 2 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage.
This device can be used to interface 5V to 3V.
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 2003
1/7

74V2T08STR 產(chǎn)品屬性

  • 1

  • 集成電路 (IC)

  • 邏輯 - 柵極和逆變器

  • 74V

  • 與門

  • 2

  • 2

  • -

  • 4.5 V ~ 5.5 V

  • 1µA

  • 8mA，8mA

  • 0.8V

  • 2V

  • 6.5ns @ 4.5V ~ 5.5V，50pF

  • -55°C ~ 125°C

  • 表面貼裝

  • SOT-23-8

  • SOT-23-8

  • Digi-Reel®

  • 497-1314-6

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